kernel.git/drivers/mtd/nand/Makefile, branch linux-4.6.y

mtd: nand: Qualcomm NAND controller driver

2016-03-10T19:02:17Z

The Qualcomm NAND controller is found in SoCs like IPQ806x, MSM7xx, MDM9x15 series. It exists as a sub block inside the IPs EBI2 (External Bus Interface 2) and QPIC (Qualcomm Parallel Interface Controller). These IPs provide a broader interface for external slow peripheral devices such as LCD and NAND/NOR flash memory or SRAM like interfaces. We add support for the NAND controller found within EBI2. For the SoCs of our interest, we only use the NAND controller within EBI2. Therefore, it's safe for us to assume that the NAND controller is a standalone block within the SoC. The controller supports 512B, 2kB, 4kB and 8kB page 8-bit and 16-bit NAND flash devices. It contains a HW ECC block that supports BCH ECC (4, 8 and 16 bit correction/step) and RS ECC(4 bit correction/step) that covers main and spare data. The controller contains an internal 512 byte page buffer to which we read/write via DMA. The EBI2 type NAND controller uses ADM DMA for register read/write and data transfers. The controller performs page reads and writes at a codeword/step level of 512 bytes. It can support up to 2 external chips of different configurations. The driver prepares register read and write configuration descriptors for each codeword, followed by data descriptors to read or write data from the controller's internal buffer. It uses a single ADM DMA channel that we get via dmaengine API. The controller requires 2 ADM CRCIs for command and data flow control. These are passed via DT. The ecc layout used by the controller is syndrome like, but we can't use the standard syndrome ecc ops because of several reasons. First, the amount of data bytes covered by ecc isn't same in each step. Second, writing to free oob space requires us writing to the entire step in which the oob lies. This forces us to create our own ecc ops. One more difference is how the controller accesses the bad block marker. The controller ignores reading the marker when ECC is enabled. ECC needs to be explicity disabled to read or write to the bad block marker. The nand_bbt helpers library hence can't access BBMs for the controller. For now, we skip the creation of BBT and populate chip->block_bad and chip->block_markbad helpers instead. Reviewed-by: Andy Gross Signed-off-by: Stephen Boyd Signed-off-by: Archit Taneja Reviewed-by: Boris Brezillon Signed-off-by: Brian Norris

mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs

2016-01-07T17:35:11Z

Add a driver for NAND devices connected to the NEMC on JZ4780 SoCs, as well as the hardware BCH controller. DMA is not currently implemented. While older 47xx SoCs also have a BCH controller, they are incompatible with the one in the 4780 due to differing register/bit positions, which would make implementing a common driver for them quite messy. Signed-off-by: Alex Smith Cc: Zubair Lutfullah Kakakhel Cc: David Woodhouse Cc: linux-mtd@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Harvey Hunt Reviewed-by: Boris Brezillon [Brian: fixed a few small mistakes] Signed-off-by: Brian Norris

mtd: nand: vf610_nfc: Freescale NFC for VF610, MPC5125 and others

2015-09-29T20:47:58Z

This driver supports Freescale NFC (NAND flash controller) found on Vybrid (VF610), MPC5125, MCF54418 and Kinetis K70. The driver has been tested using 8-bit and 16-bit NAND interface on the ARM based Vybrid SoC VF500 and VF610 platform. parameter page reading. Limitations: - Untested on MPC5125 and M54418. - DMA and pipelining not used. - 2K pages or less. - No chip select, one NAND chip per controller. - No hardware ECC. Some paths have been hand-optimized and evaluated by measurements made using mtd_speedtest.ko on a 100MB MTD partition. Colibri VF50 eb write % eb read % page write % page read % rel/opt 5175 11537 4560 11039 opt 5164 -0.21 11420 -1.01 4737 +3.88 10918 -1.10 none 5113 -1.20 11352 -1.60 4490 -1.54 10865 -1.58 Colibri VF61 eb write % eb read % page write % page read % rel/opt 5766 13096 5459 12846 opt 5883 +2.03 13064 -0.24 5561 +1.87 12802 -0.34 none 5701 -1.13 12980 -0.89 5488 +0.53 12735 -0.86 rel = using readl_relaxed/writel_relaxed in optimized paths opt = hand-optimized by combining multiple accesses into one read/write The measurements have not been statistically verfied, hence use them with care. The author came to the conclusion that using the relaxed variants of readl/writel are not worth the additional code. Signed-off-by: Bill Pringlemeir Tested-by: Albert ARIBAUD Signed-off-by: Stefan Agner Reviewed-by: Alexey Klimov Signed-off-by: Brian Norris

mtd: nand: omap2: Rename shippable module to omap2_nand

2015-09-02T21:04:49Z

As both omap2 onenand and omap2 nand driver modules are named the same i.e. "omap2.ko", only one of them gets shipped during MODPOST if both are configured as loadable modules. To avoid this ambiguity let's ship the omap2 nand driver as "omap2_nand.ko" Reported by Pierre Neyron via github https://github.com/beagleboard/linux/issues/40 Cc: Robert Nelson Signed-off-by: Roger Quadros Signed-off-by: Brian Norris

mtd: nand: add NAND driver "library" for Broadcom STB NAND controller

2015-05-15T20:15:58Z

This core originated in Set-Top Box chips (BCM7xxx) but is used in a variety of other Broadcom chips, including some BCM63xxx, BCM33xx, and iProc/Cygnus. It's been used only on ARM and MIPS SoCs, so restrict it to those architectures. There are multiple revisions of this core throughout the years, and almost every version broke register compatibility in some small way, but with some effort, this driver is able to support v4.0, v5.0, v6.x, v7.0, and v7.1. It's been tested on v5.0, v6.0, v6.1, v7.0, and v7.1 recently, so there hopefully are no more lurking inconsistencies. This patch adds just some library support, on which platform drivers can be built. Signed-off-by: Brian Norris Reviewed-by: Florian Fainelli Tested-by: Florian Fainelli

mtd: hisilicon: add a new NAND controller driver for hisilicon hip04 Soc

2015-02-08T08:20:19Z

This patch adds the support for hisilicon 504 NAND controller which is now used by Hisilicon Soc Hip04. Signed-off-by: Zhou Wang Signed-off-by: Brian Norris

mtd: nand: add sunxi NAND flash controller support

2014-10-29T17:08:00Z

Add support for the sunxi NAND Flash Controller (NFC). Signed-off-by: Boris Brezillon [Brian: tweaked to fix ecc->steps issue] Signed-off-by: Brian Norris

mtd: nand: Force omap_elm to be built as a module if omap2_nand is a module

2014-10-07T06:40:07Z

This commit adds a hidden option to build the omap_elm as a module, if omap2_nand is a module (and similarly in the built-in case). This fixes the following build error when omap2_nand is chosen built-in, and omap_elm is chosen as a module: drivers/built-in.o: In function `omap_nand_probe': drivers/mtd/nand/omap2.c:2010: undefined reference to `elm_config' drivers/mtd/nand/omap2.c:1980: undefined reference to `elm_config' drivers/mtd/nand/omap2.c:1927: undefined reference to `elm_config' drivers/built-in.o: In function `omap_elm_correct_data': drivers/mtd/nand/omap2.c:1444: undefined reference to `elm_decode_bch_error_page' Reported-by: Arnd Bergmann Signed-off-by: Ezequiel Garcia Signed-off-by: Roger Quadros Signed-off-by: Brian Norris

mtd: nand: Move ELM driver and rename as omap_elm

2014-09-22T18:39:26Z

The ELM driver is only used by the OMAP NAND driver, so let's move it to the nand/ directory. Additionally, let's rename it to a less confusing name, so the module is built with a meaningful name, instead of the previous 'elm.ko'. Acked-by: Roger Quadros Signed-off-by: Ezequiel Garcia Signed-off-by: Brian Norris

mtd: nand: add ONFI timing mode to nand_timings converter

2014-07-22T02:39:55Z

Add a converter to retrieve NAND timings from an ONFI NAND timing mode. At the moment, only SDR NAND timings are supported. Signed-off-by: Boris BREZILLON Signed-off-by: Brian Norris