<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/iio/adc, branch linux-6.8.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.8.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.8.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2024-04-03T13:32:08Z</updated>
<entry>
<title>iio: adc: rockchip_saradc: use mask for write_enable bitfield</title>
<updated>2024-04-03T13:32:08Z</updated>
<author>
<name>Quentin Schulz</name>
</author>
<published>2024-02-23T12:45:22Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=4434bd1c5830f5f003c3bd60eae0cd0fba076aa9'/>
<id>urn:sha1:4434bd1c5830f5f003c3bd60eae0cd0fba076aa9</id>
<content type='text'>
[ Upstream commit 5b4e4b72034f85f7a0cdd147d3d729c5a22c8764 ]

Some of the registers on the SARADCv2 have bits write protected except
if another bit is set. This is usually done by having the lowest 16 bits
store the data to write and the highest 16 bits specify which of the 16
lowest bits should have their value written to the hardware block.

The write_enable mask for the channel selection was incorrect because it
was just the value shifted by 16 bits, which means it would only ever
write bits and never clear them. So e.g. if someone starts a conversion
on channel 5, the lowest 4 bits would be 0x5, then starts a conversion
on channel 0, it would still be 5.

Instead of shifting the value by 16 as the mask, let's use the OR'ing of
the appropriate masks shifted by 16.

Note that this is not an issue currently because the only SARADCv2
currently supported has a reset defined in its Device Tree, that reset
resets the SARADC controller before starting a conversion on a channel.
However, this reset is handled as optional by the probe function and
thus proper masking should be used in the event an SARADCv2 without a
reset ever makes it upstream.

Fixes: 757953f8ec69 ("iio: adc: rockchip_saradc: Add support for RK3588")
Signed-off-by: Quentin Schulz &lt;quentin.schulz@theobroma-systems.com&gt;
Reviewed-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Link: https://lore.kernel.org/r/20240223-saradcv2-chan-mask-v1-2-84b06a0f623a@theobroma-systems.com
Cc: &lt;Stable@vger.kernel.org&gt;
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>iio: adc: rockchip_saradc: fix bitmask for channels on SARADCv2</title>
<updated>2024-04-03T13:32:08Z</updated>
<author>
<name>Quentin Schulz</name>
</author>
<published>2024-02-23T12:45:21Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2349f90e50e082126053ef0156bfb9d4c3a5b856'/>
<id>urn:sha1:2349f90e50e082126053ef0156bfb9d4c3a5b856</id>
<content type='text'>
[ Upstream commit b0a4546df24a4f8c59b2d05ae141bd70ceccc386 ]

The SARADCv2 on RK3588 (the only SoC currently supported that has an
SARADCv2) selects the channel through the channel_sel bitfield which is
the 4 lowest bits, therefore the mask should be GENMASK(3, 0) and not
GENMASK(15, 0).

Fixes: 757953f8ec69 ("iio: adc: rockchip_saradc: Add support for RK3588")
Signed-off-by: Quentin Schulz &lt;quentin.schulz@theobroma-systems.com&gt;
Reviewed-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Reviewed-by: Andy Shevchenko &lt;andy.shevchenko@gmail.com&gt;
Link: https://lore.kernel.org/r/20240223-saradcv2-chan-mask-v1-1-84b06a0f623a@theobroma-systems.com
Cc: &lt;Stable@vger.kernel.org&gt;
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>iio: adc: ad4130: only set GPIO_CTRL if pin is unused</title>
<updated>2024-02-10T16:52:39Z</updated>
<author>
<name>Cosmin Tanislav</name>
</author>
<published>2024-02-07T13:20:06Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=78367c32bebfe833cd30c855755d863a4ff3fdee'/>
<id>urn:sha1:78367c32bebfe833cd30c855755d863a4ff3fdee</id>
<content type='text'>
Currently, GPIO_CTRL bits are set even if the pins are used for
measurements.

GPIO_CTRL bits should only be set if the pin is not used for
other functionality.

Fix this by only setting the GPIO_CTRL bits if the pin has no
other function.

Fixes: 62094060cf3a ("iio: adc: ad4130: add AD4130 driver")
Signed-off-by: Cosmin Tanislav &lt;demonsingur@gmail.com&gt;
Reviewed-by: Nuno Sa &lt;nuno.sa@analog.com&gt;
Link: https://lore.kernel.org/r/20240207132007.253768-2-demonsingur@gmail.com
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
</content>
</entry>
<entry>
<title>iio: adc: ad4130: zero-initialize clock init data</title>
<updated>2024-02-10T16:52:39Z</updated>
<author>
<name>Cosmin Tanislav</name>
</author>
<published>2024-02-07T13:20:05Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a22b0a2be69a36511cb5b37d948b651ddf7debf3'/>
<id>urn:sha1:a22b0a2be69a36511cb5b37d948b651ddf7debf3</id>
<content type='text'>
The clk_init_data struct does not have all its members
initialized, causing issues when trying to expose the internal
clock on the CLK pin.

Fix this by zero-initializing the clk_init_data struct.

Fixes: 62094060cf3a ("iio: adc: ad4130: add AD4130 driver")
Signed-off-by: Cosmin Tanislav &lt;demonsingur@gmail.com&gt;
Reviewed-by: Nuno Sa &lt;nuno.sa@analog.com&gt;
Link: https://lore.kernel.org/r/20240207132007.253768-1-demonsingur@gmail.com
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
</content>
</entry>
<entry>
<title>iio: adc: ad7091r8: Fix error code in ad7091r8_gpio_setup()</title>
<updated>2024-01-22T18:59:07Z</updated>
<author>
<name>Dan Carpenter</name>
</author>
<published>2024-01-08T09:07:02Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=9c46e3a5232d855a65f440b298a2a66497f799d2'/>
<id>urn:sha1:9c46e3a5232d855a65f440b298a2a66497f799d2</id>
<content type='text'>
There is a copy and paste error so it accidentally returns -&gt;convst_gpio
instead of -&gt;reset_gpio.  Fix it.

Fixes: 0b76ff46c463 ("iio: adc: Add support for AD7091R-8")
Signed-off-by: Dan Carpenter &lt;dan.carpenter@linaro.org&gt;
Reviewed-by: Marcelo Schmitt &lt;marcelo.schmitt1@gmail.com&gt;
Link: https://lore.kernel.org/r/fd905ad0-6413-489c-9a3b-90c0cdb35ec9@moroto.mountain
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'char-misc-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc</title>
<updated>2024-01-18T00:47:17Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2024-01-18T00:47:17Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=296455ade1fdcf5f8f8c033201633b60946c589a'/>
<id>urn:sha1:296455ade1fdcf5f8f8c033201633b60946c589a</id>
<content type='text'>
Pull char/misc and other driver updates from Greg KH:
 "Here is the big set of char/misc and other driver subsystem changes
  for 6.8-rc1.

  Other than lots of binder driver changes (as you can see by the merge
  conflicts) included in here are:

   - lots of iio driver updates and additions

   - spmi driver updates

   - eeprom driver updates

   - firmware driver updates

   - ocxl driver updates

   - mhi driver updates

   - w1 driver updates

   - nvmem driver updates

   - coresight driver updates

   - platform driver remove callback api changes

   - tags.sh script updates

   - bus_type constant marking cleanups

   - lots of other small driver updates

  All of these have been in linux-next for a while with no reported
  issues"

* tag 'char-misc-6.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (341 commits)
  android: removed duplicate linux/errno
  uio: Fix use-after-free in uio_open
  drivers: soc: xilinx: add check for platform
  firmware: xilinx: Export function to use in other module
  scripts/tags.sh: remove find_sources
  scripts/tags.sh: use -n to test archinclude
  scripts/tags.sh: add local annotation
  scripts/tags.sh: use more portable -path instead of -wholename
  scripts/tags.sh: Update comment (addition of gtags)
  firmware: zynqmp: Convert to platform remove callback returning void
  firmware: turris-mox-rwtm: Convert to platform remove callback returning void
  firmware: stratix10-svc: Convert to platform remove callback returning void
  firmware: stratix10-rsu: Convert to platform remove callback returning void
  firmware: raspberrypi: Convert to platform remove callback returning void
  firmware: qemu_fw_cfg: Convert to platform remove callback returning void
  firmware: mtk-adsp-ipc: Convert to platform remove callback returning void
  firmware: imx-dsp: Convert to platform remove callback returning void
  firmware: coreboot_table: Convert to platform remove callback returning void
  firmware: arm_scpi: Convert to platform remove callback returning void
  firmware: arm_scmi: Convert to platform remove callback returning void
  ...
</content>
</entry>
<entry>
<title>iio: adc: Add support for AD7091R-8</title>
<updated>2023-12-26T15:43:33Z</updated>
<author>
<name>Marcelo Schmitt</name>
</author>
<published>2023-12-19T20:32:36Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0b76ff46c46332f3415be4dc5f9771d5eb2f0f18'/>
<id>urn:sha1:0b76ff46c46332f3415be4dc5f9771d5eb2f0f18</id>
<content type='text'>
Add support for Analog Devices AD7091R-2, AD7091R-4, and AD7091R-8
low power 12-Bit SAR ADCs with SPI interface.
Extend ad7091r-base driver so it can be used by the AD7091R-8 driver.

Signed-off-by: Marcelo Schmitt &lt;marcelo.schmitt@analog.com&gt;
Link: https://lore.kernel.org/r/09d1d1c4b39cecc528488efac6094233715f5659.1703013352.git.marcelo.schmitt1@gmail.com
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
</content>
</entry>
<entry>
<title>iio: adc: Split AD7091R-5 config symbol</title>
<updated>2023-12-26T15:42:45Z</updated>
<author>
<name>Marcelo Schmitt</name>
</author>
<published>2023-12-19T20:29:52Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=276ceecaa2e8bd0b7b0437e3556fccca991a04f7'/>
<id>urn:sha1:276ceecaa2e8bd0b7b0437e3556fccca991a04f7</id>
<content type='text'>
Split AD7091R-5 kconfig symbol into one symbol for the base AD7091R driver
and another one for the I2C interface AD7091R-5 driver.

Signed-off-by: Marcelo Schmitt &lt;marcelo.schmitt@analog.com&gt;
Link: https://lore.kernel.org/r/8cae37c611c1b0fe3faef7a4b8c4cc915eaeddc7.1703013352.git.marcelo.schmitt1@gmail.com
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
</content>
</entry>
<entry>
<title>iio: adc: ad7091r: Add chip_info callback to get conversion result channel</title>
<updated>2023-12-26T15:42:24Z</updated>
<author>
<name>Marcelo Schmitt</name>
</author>
<published>2023-12-19T20:29:30Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8eb5976abfc5990367ca660ce8e222bba6f812c3'/>
<id>urn:sha1:8eb5976abfc5990367ca660ce8e222bba6f812c3</id>
<content type='text'>
AD7091R-5 and AD7091R-2/-4/-8 have slightly different register field
layout and due to that require different masks for getting the index of
the channel associated with each read.
Add a callback function so the base driver can get correct channel ID
for each chip variant.

Signed-off-by: Marcelo Schmitt &lt;marcelo.schmitt@analog.com&gt;
Link: https://lore.kernel.org/r/1f7a40b4839b3a1c3f1a0654a1b329bea870feb6.1703013352.git.marcelo.schmitt1@gmail.com
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
</content>
</entry>
<entry>
<title>iio: adc: ad7091r: Set device mode through chip_info callback</title>
<updated>2023-12-26T15:42:01Z</updated>
<author>
<name>Marcelo Schmitt</name>
</author>
<published>2023-12-19T20:28:45Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7e3ebda32d6e8f10acbde2b204f6bf4020f7ef95'/>
<id>urn:sha1:7e3ebda32d6e8f10acbde2b204f6bf4020f7ef95</id>
<content type='text'>
AD7091R-5 devices have a few modes of operation (sample, command,
autocycle) which are set by writing to configuration register fields.
Follow up patches will add support for AD7091R-2/-4/-8 which don't have
those operation modes nor the register fields for setting them.
Make ad7091r_set_mode() a callback function of AD7091R chip_info struct
so the base driver can appropriately handle each design without having
to check which actual chip is connected.

Signed-off-by: Marcelo Schmitt &lt;marcelo.schmitt@analog.com&gt;
Link: https://lore.kernel.org/r/5140336980f66c2c45f05895c3b68e2f65fba1c2.1703013352.git.marcelo.schmitt1@gmail.com
Signed-off-by: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
</content>
</entry>
</feed>
