kernel.git/drivers/gpu/drm/xe/regs, branch linux-6.14.y

drm/xe/xe2hpg: Add Wa_22021007897

2025-06-04T12:45:10Z

[ Upstream commit b1f704107cf27906a9cea542b626b96019104663 ] Add Wa_22021007897 for the Xe2_HPG (graphics version: 20.01) IP. It is a permanent workaround, and applicable on all the steppings. Reviewed-by: Gustavo Sousa Reviewed-by: Tejas Upadhyay Signed-off-by: Aradhya Bhatia Link: https://lore.kernel.org/r/20250512065004.2576-1-aradhya.bhatia@intel.com Signed-off-by: Matt Roper (cherry picked from commit e5c13e2c505b73a8667ef9a0fd5cbd4227e483e6) Signed-off-by: Lucas De Marchi Signed-off-by: Sasha Levin

drm/xe/xe3lpg: Add Wa_13012615864

2025-05-02T06:01:34Z

[ Upstream commit 2399bcc07c01189737858e0a88ac4ffdd1d4b03d ] Wa_13012615864 applies to xe3lpg Reviewed-by: Matt Roper Link: https://patchwork.freedesktop.org/patch/msgid/20250221112200.388612-1-tejas.upadhyay@intel.com Signed-off-by: Tejas Upadhyay Stable-dep-of: 262de94a3a7e ("drm/xe: Ensure fixed_slice_mode gets set after ccs_mode change") Signed-off-by: Sasha Levin

drm/xe/ptl: Apply Wa_14023061436

2025-05-02T06:01:33Z

[ Upstream commit 92029e0baa5313ba208103f90086f59070bbf93b ] Enable WMTP for the BTD kernel to address Wa14023061436 by setting the proper TDL Chicken Bit. v2: Apply it on engine_was[] as this register is not part of LRC(Matt) Apply it for first_render_or_compute in case this gets extended to compute only platforms(Matt). Cc: Gustavo Sousa Cc: Matt Roper Reviewed-by: Matt Roper Link: https://patchwork.freedesktop.org/patch/msgid/20250108141323.311601-1-nirmoy.das@intel.com Signed-off-by: Nirmoy Das Stable-dep-of: 262de94a3a7e ("drm/xe: Ensure fixed_slice_mode gets set after ccs_mode change") Signed-off-by: Sasha Levin

drm/xe/regs: remove a duplicate definition for RING_CTL_SIZE(size)

2025-02-26T13:16:14Z

Commit b79e8fd954c4 ("drm/xe: Remove dependency on intel_engine_regs.h") introduced an internal set of engine registers, however, as part of this change, it has also introduced two duplicate `define' lines for `RING_CTL_SIZE(size)'. This commit was introduced to the tree in v6.8-rc1. While this is harmless as the definitions did not change, so no compiler warning was observed. Drop this line anyway for the sake of correctness. Cc: stable@vger.kernel.org # v6.8-rc1+ Fixes: b79e8fd954c4 ("drm/xe: Remove dependency on intel_engine_regs.h") Signed-off-by: Mingcong Bai Reviewed-by: Matthew Brost Link: https://patchwork.freedesktop.org/patch/msgid/20250225073104.865230-1-jeffbai@aosc.io Signed-off-by: Rodrigo Vivi (cherry picked from commit 6b68c4542ffecc36087a9e14db8fc990c88bb01b) Signed-off-by: Rodrigo Vivi

drm/xe/oa: Preserve oa_ctrl unused bits

2025-02-03T17:56:34Z

UMD's have interest in setting unused bits of the oa_ctrl register "out of band" for certain experiments. To facilitate this, don't clobber previous oa_ctrl unused bits, i.e. rmw the values rather than simply write them. Fixes: e936f885f1e9 ("drm/xe/oa/uapi: Expose OA stream fd") Signed-off-by: Ashutosh Dixit Reviewed-by: Umesh Nerlige Ramappa Link: https://patchwork.freedesktop.org/patch/msgid/20250117032155.3048063-1-ashutosh.dixit@intel.com (cherry picked from commit cfa9d40db8c30d894171010fe765d96e9bc6a47e) Signed-off-by: Rodrigo Vivi

drm/xe: Fix all typos in xe

2025-01-09T16:58:09Z

Fix all typos in files of xe, reported by codespell tool. Signed-off-by: Nitin Gote Reviewed-by: Andi Shyti Reviewed-by: Stuart Summers Link: https://patchwork.freedesktop.org/patch/msgid/20250106102646.1400146-2-nitin.r.gote@intel.com Signed-off-by: Nirmoy Das

drm/xe: Introduce the RPa information

2025-01-08T20:49:21Z

RPa is the Achievable frequency, defined by PCODE at runtime based on multiple running conditions. v2: Remove RPA_MASK from i915 file Cc: Vinay Belgaumkar Reviewed-by: Jonathan Cavitt Reviewed-by: Vinay Belgaumkar Link: https://patchwork.freedesktop.org/patch/msgid/20241220152936.623627-1-rodrigo.vivi@intel.com Signed-off-by: Rodrigo Vivi

drm/xe: Initial MSI-X support for HW engines

2024-12-13T18:38:13Z

- Configure the HW engines to work with MSI-X - Program the LRC to use memirq infra (similar to VF) - CS_INT_VEC field added to the LRC Bspec: 60342, 72547 Signed-off-by: Ilia Levi Reviewed-by: Piotr Piórkowski Link: https://patchwork.freedesktop.org/patch/msgid/20241213072538.6823-3-ilia.levi@intel.com Signed-off-by: Rodrigo Vivi

drm/xe/oa/uapi: Make OA buffer size configurable

2024-12-10T18:26:55Z

Add a new property called DRM_XE_OA_PROPERTY_OA_BUFFER_SIZE to allow OA buffer size to be configurable from userspace. With this OA buffer size can be configured to any power of 2 size between 128KB and 128MB and it would default to 16MB in case the size is not supplied. v2: - Rebase v3: - Add oa buffer size to capabilities [Ashutosh] - Address several nitpicks [Ashutosh] - Fix commit message/subject [Ashutosh] BSpec: 61100, 61228 Signed-off-by: Sai Teja Pottumuttu Reviewed-by: Ashutosh Dixit Signed-off-by: Ashutosh Dixit Link: https://patchwork.freedesktop.org/patch/msgid/20241205041913.883767-2-sai.teja.pottumuttu@intel.com

drm/xe/vsec: Support BMG devices

2024-12-03T20:02:55Z

The Battlemage (BMG) discrete graphics card supports the Platform, Monitoring Technology (PMT) feature directly on the primary PCI device. Utilize the PMT callback API to add support for the BMG devices. Reviewed-by: Ilpo Järvinen Reviewed-by: Rodrigo Vivi Reviewed-by: Andy Shevchenko Signed-off-by: Michael J. Ruhl Link: https://patchwork.freedesktop.org/patch/msgid/20241203153639.2982162-1-michael.j.ruhl@intel.com Signed-off-by: Rodrigo Vivi