<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/gpu/drm/tegra/drm.h, branch linux-5.14.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.14.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.14.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2021-05-31T12:29:44Z</updated>
<entry>
<title>drm/tegra: Correct DRM_FORMAT_MOD_NVIDIA_SECTOR_LAYOUT</title>
<updated>2021-05-31T12:29:44Z</updated>
<author>
<name>Dmitry Osipenko</name>
</author>
<published>2021-05-30T19:55:06Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=671cc352acd3e2b2832b59787ed8027d9f80ccc9'/>
<id>urn:sha1:671cc352acd3e2b2832b59787ed8027d9f80ccc9</id>
<content type='text'>
The format modifier is 64bit, while DRM_FORMAT_MOD_NVIDIA_SECTOR_LAYOUT
uses BIT() macro that is 32bit on ARM32.

The (modifier &amp;= ~DRM_FORMAT_MOD_NVIDIA_SECTOR_LAYOUT) doesn't work as
expected on ARM32 and tegra_fb_get_tiling() fails for the tiled formats
on 32bit Tegra because modifier mask isn't applied properly. Use the
BIT_ULL() macro to fix this trouble.

Fixes: 7b6f846785f4 ("drm/tegra: Support sector layout on Tegra194")
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Support sector layout on Tegra194</title>
<updated>2021-03-31T15:42:14Z</updated>
<author>
<name>Thierry Reding</name>
</author>
<published>2021-03-26T14:51:39Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7b6f846785f41d57917e36851c120cfbe87f0809'/>
<id>urn:sha1:7b6f846785f41d57917e36851c120cfbe87f0809</id>
<content type='text'>
Tegra194 has a special physical address bit that enables some memory
swizzling logic to support different sector layouts. Support the bit
that selects the sector layout which is passed in the framebuffer
modifier.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Count number of display controllers at runtime</title>
<updated>2021-03-31T15:42:14Z</updated>
<author>
<name>Thierry Reding</name>
</author>
<published>2021-03-26T14:51:38Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=05d1adfe2a8b5c6a794a9927d1991a00c5d68f1d'/>
<id>urn:sha1:05d1adfe2a8b5c6a794a9927d1991a00c5d68f1d</id>
<content type='text'>
In order to be able to attach planes to all possible display controllers
the exact number of CRTCs must be known. Keep track of the number of the
display controllers that register during initialization.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: dc: Parameterize maximum resolution</title>
<updated>2021-03-31T15:42:14Z</updated>
<author>
<name>Thierry Reding</name>
</author>
<published>2021-03-26T14:51:33Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=042c0bd76d7b053ea6bc47e4db471d5cfc7f19c5'/>
<id>urn:sha1:042c0bd76d7b053ea6bc47e4db471d5cfc7f19c5</id>
<content type='text'>
Tegra186 and later support a higher maximum resolution than earlier
chips, so make sure to reflect that in the mode configuration.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: output: Support DRM bridges</title>
<updated>2020-09-17T10:30:11Z</updated>
<author>
<name>Dmitry Osipenko</name>
</author>
<published>2020-08-13T22:06:54Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f00b9dd579d0078123e33434c25f37d42747574d'/>
<id>urn:sha1:f00b9dd579d0078123e33434c25f37d42747574d</id>
<content type='text'>
Newer Tegra device-trees will specify a video output graph which involves
a bridge. This patch adds initial support for the DRM bridges to the Tegra
DRM output.

Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Signed-off-by: Dmitry Osipenko &lt;digetx@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Clean up GPIO includes</title>
<updated>2020-04-17T15:16:22Z</updated>
<author>
<name>Linus Walleij</name>
</author>
<published>2020-04-15T12:24:27Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ac2caae61e566dc0a45ac264f5484e619366ce42'/>
<id>urn:sha1:ac2caae61e566dc0a45ac264f5484e619366ce42</id>
<content type='text'>
The Tegra DRM drivers includes the legacy GPIO headers
&lt;linux/gpio.h&gt; and &lt;linux/of_gpio.h&gt; but what it really
uses is &lt;linux/gpio/consumer.h&gt; since only gpio_desc
structs are ever referenced.

Include the right header on the top level tegra/drm.h
file and drop all the surplus includes.

Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20200415122427.111769-1-linus.walleij@linaro.org
</content>
</entry>
<entry>
<title>drm/tegra: Use simple encoder</title>
<updated>2020-04-02T12:16:45Z</updated>
<author>
<name>Thomas Zimmermann</name>
</author>
<published>2020-03-05T15:59:43Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=4d0e95e0e5679936b45848826aa080ced1ba40c8'/>
<id>urn:sha1:4d0e95e0e5679936b45848826aa080ced1ba40c8</id>
<content type='text'>
The tegra driver uses empty implementations for its encoders. Replace
the code with the generic simple encoder.

Signed-off-by: Thomas Zimmermann &lt;tzimmermann@suse.de&gt;
Reviewed-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Acked-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20200305155950.2705-16-tzimmermann@suse.de
</content>
</entry>
<entry>
<title>drm/tegra: Do not implement runtime PM</title>
<updated>2020-01-10T15:37:43Z</updated>
<author>
<name>Thierry Reding</name>
</author>
<published>2019-12-02T14:29:03Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=fd67e9c6ed5af223af0daee093593abe3dbb53d4'/>
<id>urn:sha1:fd67e9c6ed5af223af0daee093593abe3dbb53d4</id>
<content type='text'>
The Tegra DRM driver heavily relies on the implementations for runtime
suspend/resume to be called at specific times. Unfortunately, there are
some cases where that doesn't work. One example is if the user disables
runtime PM for a given subdevice. Another example is that the PM core
acquires a reference to runtime PM during system sleep, effectively
preventing devices from going into low power modes. This is intentional
to avoid nasty race conditions, but it also causes system sleep to not
function properly on all Tegra systems.

Fix this by not implementing runtime PM at all. Instead, a minimal,
reference-counted suspend/resume infrastructure is added to the host1x
bus. This has the benefit that it can be used regardless of the system
power state (or any transitions we might be in), or whether or not the
user allows runtime PM.

Atomic modesetting guarantees that these functions will end up being
called at the right point in time, so the pitfalls for the more generic
runtime PM do not apply here.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Optionally attach clients to the IOMMU</title>
<updated>2019-10-29T14:04:37Z</updated>
<author>
<name>Thierry Reding</name>
</author>
<published>2019-10-28T12:37:18Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=fa6661b7aa0b52073681b0d26742650c8cbd30f3'/>
<id>urn:sha1:fa6661b7aa0b52073681b0d26742650c8cbd30f3</id>
<content type='text'>
If a client is already attached to an IOMMU domain that is not the
shared domain, don't try to attach it again. This allows using the
IOMMU-backed DMA API.

Since the IOMMU-backed DMA API is now supported and there's no way
to detach from it on 64-bit ARM, don't bother to detach from it on
32-bit ARM either.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Simplify IOMMU group selection</title>
<updated>2019-10-29T14:04:34Z</updated>
<author>
<name>Thierry Reding</name>
</author>
<published>2019-10-28T12:37:08Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7edd7961e58d531d19758134919de13dac47bcbe'/>
<id>urn:sha1:7edd7961e58d531d19758134919de13dac47bcbe</id>
<content type='text'>
All the devices that make up the DRM device are now part of the same
IOMMU group. This simplifies the handling of the IOMMU attachment and
also avoids exhausting the number of IOMMUs available on early Tegra
SoC generations.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
</feed>
