<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/gpu/drm/tegra/dc.c, branch linux-3.14.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.14.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.14.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2014-01-23T14:51:32Z</updated>
<entry>
<title>drm/tegra: Obtain head number from DT</title>
<updated>2014-01-23T14:51:32Z</updated>
<author>
<name>Thierry Reding</name>
</author>
<published>2014-01-09T16:08:36Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=13411ddd319057ae334a4084ebcf2c741b317f34'/>
<id>urn:sha1:13411ddd319057ae334a4084ebcf2c741b317f34</id>
<content type='text'>
The head number of a given display controller is fixed in hardware and
required to program outputs appropriately. Relying on the driver probe
order to determine this number will not work, since that could yield a
situation where the second head was probed first and would be assigned
head number 0 instead of 1.

By explicitly specifying the head number in the device tree, it is no
longer necessary to rely on these assumptions. As a fallback, if the
property isn't available, derive the head number from the display
controller node's position in the device tree. That's somewhat more
reliable than the previous default but not a proper solution.

Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Relocate some output-specific code</title>
<updated>2013-12-20T14:56:07Z</updated>
<author>
<name>Thierry Reding</name>
</author>
<published>2013-12-12T10:06:55Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=72d302861530bcdb780ea57ebfc3dff6ec4f802c'/>
<id>urn:sha1:72d302861530bcdb780ea57ebfc3dff6ec4f802c</id>
<content type='text'>
Some of the code in the CRTC's mode setting code is specific to the RGB
output or needs to be called slightly differently depending on the type
of output. Push that code down into the output drivers.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Add Tegra124 DC support</title>
<updated>2013-12-20T14:56:06Z</updated>
<author>
<name>Thierry Reding</name>
</author>
<published>2013-12-12T10:03:59Z</published>
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<id>urn:sha1:8620fc629aeec02ac3b3735703940696386a3039</id>
<content type='text'>
Tegra124 and later support interlacing, but the driver doesn't support
it yet. Make sure interlacing stays disabled on hardware that supports
it.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: use reset framework</title>
<updated>2013-12-11T23:43:04Z</updated>
<author>
<name>Stephen Warren</name>
</author>
<published>2013-11-06T23:20:54Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ca48080a039f667c9a1e2d6236ea18dde2d36e7e'/>
<id>urn:sha1:ca48080a039f667c9a1e2d6236ea18dde2d36e7e</id>
<content type='text'>
Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-By: Terje Bergstrom &lt;tbergstrom@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Support bottom-up buffer objects</title>
<updated>2013-10-31T08:55:46Z</updated>
<author>
<name>Thierry Reding</name>
</author>
<published>2013-10-07T07:47:58Z</published>
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<id>urn:sha1:db7fbdfd25ee009165b6c3b80a9d1c6d8534ad94</id>
<content type='text'>
The gr3d engine renders images bottom-up. Allow buffers that are used
for 3D content to be marked as such and implement support in the display
controller to present them properly.

Signed-off-by: Thierry Reding &lt;thierry.reding@avionic-design.de&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Add support for tiled buffer objects</title>
<updated>2013-10-31T08:55:46Z</updated>
<author>
<name>Thierry Reding</name>
</author>
<published>2013-10-04T20:34:01Z</published>
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<id>urn:sha1:773af77fc479fd454c3f6836f86bf63996545cf4</id>
<content type='text'>
The gr2d and gr3d engines work more efficiently on buffers with a tiled
memory layout. Allow created buffers to be marked as tiled so that the
display controller can scan them out properly.

Signed-off-by: Thierry Reding &lt;thierry.reding@avionic-design.de&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Allocate resources at probe time</title>
<updated>2013-10-31T08:55:41Z</updated>
<author>
<name>Thierry Reding</name>
</author>
<published>2013-10-14T12:26:42Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=59d29c0ec93fe9879673b302a182fb3fb80896c3'/>
<id>urn:sha1:59d29c0ec93fe9879673b302a182fb3fb80896c3</id>
<content type='text'>
Since the .init() and .exit() functions are executed whenever the DRM
driver is loaded or unloaded, care must be taken not to use them for
resource allocation. Otherwise deferred probing cannot be used, since
the .init() and .exit() are not run at probe time. Similarly the code
that frees resources must be run at .remove() time. If it is run from
the .exit() function, it can release resources multiple times.

To handle this more consistently, rename the tegra_output_parse_dt()
function to tegra_output_probe() and introduce tegra_output_remove()
which can be used to free output-related resources.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Properly cleanup and zero out resources</title>
<updated>2013-10-31T08:55:40Z</updated>
<author>
<name>Thierry Reding</name>
</author>
<published>2013-10-14T12:06:02Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f002abc19acb6f7cdb3d320f3b6f1a565c0be63e'/>
<id>urn:sha1:f002abc19acb6f7cdb3d320f3b6f1a565c0be63e</id>
<content type='text'>
When the DRM driver is unloaded, all the associated resources must be
cleaned up and zeroed out. This is necessary because of the architecture
of the Tegra DRM driver, where not all subdrivers are unloaded along
with the DRM driver. Therefore device-managed managed won't be freed and
memory cannot be assumed to have been cleared (because it hasn't been
reallocated using kzalloc()) by the time the DRM driver is reloaded. It
is therefore necessary to zero out the structures to prevent strange
errors (such as slab corruptions) from occurring.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Move driver to DRM tree</title>
<updated>2013-10-31T08:55:40Z</updated>
<author>
<name>Thierry Reding</name>
</author>
<published>2013-10-09T08:32:49Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=dee8268f8fb218c9e9b604a40f7dbdd395e910f9'/>
<id>urn:sha1:dee8268f8fb218c9e9b604a40f7dbdd395e910f9</id>
<content type='text'>
In order to make subsystem-wide changes easier, move the Tegra DRM
driver back into the DRM tree.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>drm/tegra: Move drm to live under host1x</title>
<updated>2013-04-22T10:39:11Z</updated>
<author>
<name>Terje Bergstrom</name>
</author>
<published>2013-03-22T14:34:05Z</published>
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<id>urn:sha1:4231c6b01af9f0f3eeca4b8d0d87125d78233b41</id>
<content type='text'>
Make drm part of host1x driver.

Signed-off-by: Arto Merilainen &lt;amerilainen@nvidia.com&gt;
Signed-off-by: Terje Bergstrom &lt;tbergstrom@nvidia.com&gt;
Reviewed-by: Thierry Reding &lt;thierry.reding@avionic-design.de&gt;
Tested-by: Thierry Reding &lt;thierry.reding@avionic-design.de&gt;
Tested-by: Erik Faye-Lund &lt;kusmabite@gmail.com&gt;
Signed-off-by: Thierry Reding &lt;thierry.reding@avionic-design.de&gt;
</content>
</entry>
</feed>
