kernel.git/drivers/gpu/drm/radeon/si.c, branch linux-3.12.y

drm/radeon: partially revert "fix VM_CONTEXT*_PAGE_TABLE_END_ADDR handling"

2015-06-03T09:33:15Z

commit 7c0411d2fabc2e2702c9871ffb603e251158b317 upstream. We have that bug for years and some users report side effects when fixing it on older hardware. So revert it for VM_CONTEXT0_PAGE_TABLE_END_ADDR, but keep it for VM 1-15. Signed-off-by: Christian König Signed-off-by: Alex Deucher Signed-off-by: Jiri Slaby

drm/radeon: fix VM_CONTEXT*_PAGE_TABLE_END_ADDR handling

2015-06-03T09:33:15Z

commit 607d48063512707a414e346972e2210dc71ab491 upstream. The mapping range is inclusive between starting and ending addresses. Signed-off-by: Christian König Signed-off-by: Alex Deucher Signed-off-by: Jiri Slaby

drm/radeon: drop setting UPLL to sleep mode

2015-04-09T11:14:00Z

commit a17d4996e051e78d164989b894608cf37cd5110b upstream. Just keep it working, seems to fix some PLL problems. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=73378 Signed-off-by: Christian König Signed-off-by: Alex Deucher Signed-off-by: Jiri Slaby

drm/radeon: do a posting read in si_set_irq

2015-04-09T11:13:58Z

commit 0586915ec10d0ae60de5cd3381ad25a704760402 upstream. To make sure the writes go through the pci bridge. bug: https://bugzilla.kernel.org/show_bug.cgi?id=90741 Signed-off-by: Alex Deucher Signed-off-by: Jiri Slaby

drm/radeon: make sure mode init is complete in bandwidth_update

2014-11-19T17:38:18Z

commit 8efe82ca908400785253c8f0dfcf301e6bd93488 upstream. The power management code calls into the display code for certain things. If certain power management sysfs attributes are called before the driver has finished initializing all of the hardware we can run into problems with uninitialized modesetting state. Add a check to make sure modesetting init has completed to the bandwidth update callbacks to fix this. Can be triggered by the tlp and laptop start up scripts depending on the timing. bugs: https://bugzilla.kernel.org/show_bug.cgi?id=83611 https://bugs.freedesktop.org/show_bug.cgi?id=85771 Signed-off-by: Alex Deucher Signed-off-by: Jiri Slaby

drm/radeon: set VM base addr using the PFP v2

2014-09-18T14:40:01Z

commit f1d2a26b506e9dc7bbe94fae40da0a0d8dcfacd0 upstream. Seems to make VM flushes more stable on SI and CIK. v2: only use the PFP on the GFX ring on CIK Signed-off-by: Christian König Signed-off-by: Alex Deucher Signed-off-by: Jiri Slaby

drm/radeon: fix irq ring buffer overflow handling

2014-07-30T16:02:43Z

commit e8c214d22e76dd0ead38f97f8d2dc09aac70d651 upstream. We must mask out the overflow bit as well, otherwise the wptr will never match the rptr again and the interrupt handler will loop forever. Signed-off-by: Christian König Signed-off-by: Alex Deucher Reviewed-by: Michel Dänzer Signed-off-by: Jiri Slaby

drm/radeon: use pflip irq on R600+ v2

2014-06-06T10:38:16Z

commit f5d636d2a74b755879feec35e14a259de52ccc07 upstream. Testing the update pending bit directly after issuing an update is nonsense cause depending on the pixel clock the CRTC needs a bit of time to execute the flip even when we are in the VBLANK period. This is just a non invasive patch to solve the problem at hand, a more complete and cleaner solution should follow in the next merge window. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=76564 v2: fix source IDs for CRTC2-6 Signed-off-by: Christian König Signed-off-by: Jiri Slaby

drm/radeon/si: make sure mc ucode is loaded before checking the size

2014-06-06T10:38:13Z

commit 8c79bae6a30f606b7a4e17c994bc5f72f8fdaf11 upstream. Avoid a possible segfault. Noticed-by: Dan Carpenter Signed-off-by: Alex Deucher Signed-off-by: Jiri Slaby

drm/radeon: add support for newer mc ucode on SI (v2)

2014-06-06T09:40:26Z

commit 1ebe92802eaf0569784dce843bc28a78842d236c upstream. May fix stability issues with some newer cards. v2: print out mc firmware version used and size Signed-off-by: Alex Deucher Signed-off-by: Jiri Slaby