kernel.git/drivers/gpu/drm/radeon/reg_srcs, branch linux-3.13.y

drm/radeon: fix VGT_GS_INSTANCE_CNT register

2013-12-02T22:50:56Z

This register was incorrect for evergreen and cayman. Signed-off-by: Dave Airlie Signed-off-by: Alex Deucher

drm/radeon: Fix a typo in Cayman and Evergreen registers

2013-12-02T22:50:56Z

According to documentation, 0x00008A60 should be PA_SU_LINE_STIPPLE_VALUE. Signed-off-by: Alexandre Demers Signed-off-by: Alex Deucher

drm/radeon: add WAIT_UNTIL to the non-VM safe regs list for cayman/TN

2013-01-28T03:38:44Z

Newer versions of mesa emit this. Signed-off-by: Alex Deucher Cc: stable@vger.kernel.org

drm/radeon: allow FP16 color clear registers on r500

2013-01-15T14:07:12Z

Probably not a candidate for stable kernels because of conflicts in DRM versioning. Signed-off-by: Marek Olšák Signed-off-by: Alex Deucher

drm/radeon: add proper checking of RESOLVE_BOX command for r600-r700

2012-08-29T16:11:00Z

Checking of the second colorbuffer was skipped on r700, because CB_TARGET_MASK was 0xf. With r600, CB_TARGET_MASK is changed to 0xff, so we must set the number of samples of the second colorbuffer to 1 in order to pass the CS checker. The DRM version is bumped, because RESOLVE_BOX is always rejected without this fix on r600. Signed-off-by: Marek Olšák Reviewed-by: Jerome Glisse Signed-off-by: Alex Deucher

drm/radeon: allow CMASK and FMASK in the CS checker on r600-r700

2012-08-20T15:09:49Z

MSAA is impossible without them. Signed-off-by: Marek Olšák Signed-off-by: Alex Deucher Reviewed-by: Jerome Glisse

drm/radeon/kms: add htile support to the cs checker v3

2012-03-26T08:53:22Z

For 6xx+. Required for mesa to use htile support for HiZ/HiS. Userspace will check radeon version 2.14 with is bumped either by tiling patch or stream out patch. This patch only add support for htile relocation which should be enough for any userspace to implement the hyperz (using htile buffer) feature. v2: Jerome: Fix size checking for htile buffer. v3: Jerome: Adapt on top of r600/evergreen cs checker changes, also check htile surface in case only stencil is present. Signed-off-by: Pierre-Eric Pelloux-Prayer Signed-off-by: Alex Deucher Signed-off-by: Jerome Glisse Signed-off-by: Dave Airlie

drm/radeon/kms: remove some unused variables in evergreen_cs_track

2012-03-20T08:44:45Z

and document the other unused ones. Signed-off-by: Marek Olšák Reviewed-by: Alex Deucher Signed-off-by: Dave Airlie

drm/radeon/kms: skip cb/db checking if SX_MISC is 1 on r600+

2012-03-20T08:44:12Z

Signed-off-by: Marek Olšák Reviewed-by: Alex Deucher Signed-off-by: Dave Airlie

drm/radeon: add support for evergreen/ni tiling informations v11

2012-02-13T12:28:13Z

evergreen and northern island gpu needs more informations for 2D tiling than previous r6xx/r7xx. Add field to tiling ioctl to allow userspace to provide those. The v8 cs checking change to track color view on r6xx/r7xx doesn't affect old userspace as old userspace always emited 0 for this register. v2 fix r6xx/r7xx 2D tiling computation v3 fix r6xx/r7xx height align for untiled surface & add support for tile split on evergreen and newer v4 improve tiling debugging output v5 fix tile split code for evergreen and newer v6 set proper tile split for crtc register v7 fix tile split limit value v8 add COLOR_VIEW checking to r6xx/r7xx checker, add evergreen cs checking, update safe reg for r600, evergreen and cayman. Evergreen checking need some work around for stencil alignment issues v9 fix tile split value range, fix compressed texture handling and mipmap calculation, allow evergreen check to be silencious in front of current broken userspace (depth/stencil alignment issue) v10 fix eg 3d texture and compressed texture, fix r600 depth array, fix r600 color view computation, add support for evergreen stencil split v11 more verbose debugging in some case Signed-off-by: Jerome Glisse Signed-off-by: Dave Airlie