<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/gpu/drm/radeon/cik.c, branch linux-3.12.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.12.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.12.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2015-08-04T14:52:19Z</updated>
<entry>
<title>drm/radeon: compute ring fix hibernation (CI GPU family) v2.</title>
<updated>2015-08-04T14:52:19Z</updated>
<author>
<name>Jérôme Glisse</name>
</author>
<published>2015-06-19T14:32:15Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=65d1e93200ae8e4d35abd2848a448884bfd52ecd'/>
<id>urn:sha1:65d1e93200ae8e4d35abd2848a448884bfd52ecd</id>
<content type='text'>
commit 161569deaa03cf3c00ed63352006193f250b0648 upstream.

In order for hibernation to reliably work we need to cleanup more
thoroughly the compute ring. Hibernation is different from suspend
resume as when we resume from hibernation the hardware is first
fully initialize by regular kernel then freeze callback happens
(which correspond to a suspend inside the radeon kernel driver)
and turn off each of the block. It turns out we were not cleanly
shutting down the compute ring. This patch fix that.

Hibernation and suspend to ram were tested (several times) on :
Bonaire
Hawaii
Mullins
Kaveri
Kabini

Changed since v1:
  - Factor the ring stop logic into a function taking ring as arg.

Signed-off-by: Jérôme Glisse &lt;jglisse@redhat.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Jiri Slaby &lt;jslaby@suse.cz&gt;

</content>
</entry>
<entry>
<title>drm/radeon: partially revert "fix VM_CONTEXT*_PAGE_TABLE_END_ADDR handling"</title>
<updated>2015-06-03T09:33:15Z</updated>
<author>
<name>Christian König</name>
</author>
<published>2015-05-28T13:51:59Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c58fe902f9b36ae78496b32c0d2d7c05e1c301f5'/>
<id>urn:sha1:c58fe902f9b36ae78496b32c0d2d7c05e1c301f5</id>
<content type='text'>
commit 7c0411d2fabc2e2702c9871ffb603e251158b317 upstream.

We have that bug for years and some users report side effects when fixing it on older hardware.

So revert it for VM_CONTEXT0_PAGE_TABLE_END_ADDR, but keep it for VM 1-15.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Jiri Slaby &lt;jslaby@suse.cz&gt;

</content>
</entry>
<entry>
<title>drm/radeon: fix VM_CONTEXT*_PAGE_TABLE_END_ADDR handling</title>
<updated>2015-06-03T09:33:15Z</updated>
<author>
<name>Christian König</name>
</author>
<published>2015-05-12T12:56:17Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f798148dddfe30f6a90ab31111f758b6f4058c9b'/>
<id>urn:sha1:f798148dddfe30f6a90ab31111f758b6f4058c9b</id>
<content type='text'>
commit 607d48063512707a414e346972e2210dc71ab491 upstream.

The mapping range is inclusive between starting and ending addresses.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Jiri Slaby &lt;jslaby@suse.cz&gt;

</content>
</entry>
<entry>
<title>drm/radeon: do a posting read in cik_set_irq</title>
<updated>2015-04-09T11:13:58Z</updated>
<author>
<name>Alex Deucher</name>
</author>
<published>2015-03-03T01:45:24Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=4ca1ac7997dbc13b8de4448f9e7e7b6d07cac3fa'/>
<id>urn:sha1:4ca1ac7997dbc13b8de4448f9e7e7b6d07cac3fa</id>
<content type='text'>
commit cffefd9bb31cd35ab745d3b49005d10616d25bdc upstream.

To make sure the writes go through the pci bridge.

bug:
https://bugzilla.kernel.org/show_bug.cgi?id=90741

Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Jiri Slaby &lt;jslaby@suse.cz&gt;
</content>
</entry>
<entry>
<title>drm/radeon: workaround for CP HW bug on CIK</title>
<updated>2015-03-12T10:10:03Z</updated>
<author>
<name>Christian König</name>
</author>
<published>2015-02-10T13:26:39Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=cfa1450a6d7f9a841b77b7411c5a9787b6ba7f6e'/>
<id>urn:sha1:cfa1450a6d7f9a841b77b7411c5a9787b6ba7f6e</id>
<content type='text'>
commit a9c73a0e022c33954835e66fec3cd744af90ec98 upstream.

Emit the EOP twice to avoid cache flushing problems.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Jiri Slaby &lt;jslaby@suse.cz&gt;
</content>
</entry>
<entry>
<title>drm/radeon: only enable kv/kb dpm interrupts once v3</title>
<updated>2015-03-12T10:10:02Z</updated>
<author>
<name>Alex Deucher</name>
</author>
<published>2015-02-06T17:53:27Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ccc0896442c154ce52bf8e125579d5f66faa9a61'/>
<id>urn:sha1:ccc0896442c154ce52bf8e125579d5f66faa9a61</id>
<content type='text'>
commit 410af8d7285a0b96314845c75c39fd612b755688 upstream.

Enable at init and disable on fini. Workaround for hardware problems.

v2 (chk): extend commit message
v3: add new function

Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt; (v2)
Signed-off-by: Jiri Slaby &lt;jslaby@suse.cz&gt;
</content>
</entry>
<entry>
<title>drm/radeon: work around a hw bug in MGCG on CIK</title>
<updated>2015-01-26T13:39:24Z</updated>
<author>
<name>Alex Deucher</name>
</author>
<published>2014-11-17T20:08:17Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5d531ee5e76b84da1c114dddd9077d1e3a2d1ff7'/>
<id>urn:sha1:5d531ee5e76b84da1c114dddd9077d1e3a2d1ff7</id>
<content type='text'>
commit 4bb62c95a7e781a238b2ab374f34b1bf91e01ddc upstream.

Always need to set bit 0 of RLC_CGTT_MGCG_OVERRIDE
to avoid unreliable doorbell updates in some cases.

Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Jiri Slaby &lt;jslaby@suse.cz&gt;
</content>
</entry>
<entry>
<title>drm/radeon: make sure mode init is complete in bandwidth_update</title>
<updated>2014-11-19T17:38:18Z</updated>
<author>
<name>Alex Deucher</name>
</author>
<published>2014-11-03T14:57:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=30c45d8c1094fa14ef7180bbd5cf3af33b49f1c8'/>
<id>urn:sha1:30c45d8c1094fa14ef7180bbd5cf3af33b49f1c8</id>
<content type='text'>
commit 8efe82ca908400785253c8f0dfcf301e6bd93488 upstream.

The power management code calls into the display code for
certain things.  If certain power management sysfs attributes
are called before the driver has finished initializing all of
the hardware we can run into problems with uninitialized
modesetting state.  Add a check to make sure modesetting
init has completed to the bandwidth update callbacks to
fix this.  Can be triggered by the tlp and laptop start
up scripts depending on the timing.

bugs:
https://bugzilla.kernel.org/show_bug.cgi?id=83611
https://bugs.freedesktop.org/show_bug.cgi?id=85771

Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Jiri Slaby &lt;jslaby@suse.cz&gt;

</content>
</entry>
<entry>
<title>drm/radeon: set correct CE ram size for CIK</title>
<updated>2014-11-19T17:38:18Z</updated>
<author>
<name>Jammy Zhou</name>
</author>
<published>2014-11-03T13:58:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=37dc09565477b5beb644ceea44341fdc46ac4dbe'/>
<id>urn:sha1:37dc09565477b5beb644ceea44341fdc46ac4dbe</id>
<content type='text'>
commit dc4edad6530a9b7b66c3d905e2bc06021a05dcad upstream.

CE ram size is 32k/0k/0k for GFX/CS0/CS1 with CIK

Ported from amdgpu driver.

Signed-off-by: Jammy Zhou &lt;Jammy.Zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Jiri Slaby &lt;jslaby@suse.cz&gt;

</content>
</entry>
<entry>
<title>drm/radeon/cik: use a separate counter for CP init timeout</title>
<updated>2014-10-13T13:40:50Z</updated>
<author>
<name>Alex Deucher</name>
</author>
<published>2014-09-23T14:20:13Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6d4933b6d7a84642bd4fe913be7182032e396e38'/>
<id>urn:sha1:6d4933b6d7a84642bd4fe913be7182032e396e38</id>
<content type='text'>
commit 370ce45b5986118fa496dddbcd7039e1aa1a418f upstream.

Otherwise we may fail to init the second compute ring.

Noticed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Jiri Slaby &lt;jslaby@suse.cz&gt;
</content>
</entry>
</feed>
