<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/gpu/drm/msm/dsi, branch linux-6.15.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.15.y</id>
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<updated>2025-06-27T10:13:36Z</updated>
<entry>
<title>drm/msm/dsi/dsi_phy_10nm: Fix missing initial VCO rate</title>
<updated>2025-06-27T10:13:36Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
</author>
<published>2025-05-20T11:13:26Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=bfba720123baf19d79df6cee45918010e87528c2'/>
<id>urn:sha1:bfba720123baf19d79df6cee45918010e87528c2</id>
<content type='text'>
[ Upstream commit 8a48e35becb214743214f5504e726c3ec131cd6d ]

Driver unconditionally saves current state on first init in
dsi_pll_10nm_init(), but does not save the VCO rate, only some of the
divider registers.  The state is then restored during probe/enable via
msm_dsi_phy_enable() -&gt; msm_dsi_phy_pll_restore_state() -&gt;
dsi_10nm_pll_restore_state().

Restoring calls dsi_pll_10nm_vco_set_rate() with
pll_10nm-&gt;vco_current_rate=0, which basically overwrites existing rate of
VCO and messes with clock hierarchy, by setting frequency to 0 to clock
tree.  This makes anyway little sense - VCO rate was not saved, so
should not be restored.

If PLL was not configured configure it to minimum rate to avoid glitches
and configuring entire in clock hierarchy to 0 Hz.

Suggested-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/sz4kbwy5nwsebgf64ia7uq4ee7wbsa5uy3xmlqwcstsbntzcov@ew3dcyjdzmi2/
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Fixes: a4ccc37693a2 ("drm/msm/dsi_pll_10nm: restore VCO rate during
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Patchwork: https://patchwork.freedesktop.org/patch/654796/
Link: https://lore.kernel.org/r/20250520111325.92352-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/dsi/phy: Define PHY_CMN_CLK_CFG[01] bitfields and simplify saving</title>
<updated>2025-02-26T10:15:49Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
</author>
<published>2025-02-19T16:23:33Z</published>
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<id>urn:sha1:0699018b41d78abba8afd85b3f62348ed88080a9</id>
<content type='text'>
Add bitfields for PHY_CMN_CLK_CFG0 and PHY_CMN_CLK_CFG1 registers to
avoid hard-coding bit masks and shifts and make the code a bit more
readable.

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Patchwork: https://patchwork.freedesktop.org/patch/638324/
Link: https://lore.kernel.org/r/20250219-drm-msm-phy-pll-cfg-reg-v5-2-d28973fa513a@linaro.org
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/dsi/phy: Use dsi_pll_cmn_clk_cfg1_update() when registering PLL</title>
<updated>2025-02-26T10:15:49Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
</author>
<published>2025-02-19T16:23:32Z</published>
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<id>urn:sha1:de36ea80b303da228844cd9379232aa4e3825f58</id>
<content type='text'>
Newly added dsi_pll_cmn_clk_cfg1_update() wrapper protects concurrent
updates to PHY_CMN_CLK_CFG1 register between driver and Common Clock
Framework.  pll_7nm_register() still used in one place previous
readl+writel, which can be simplified with this new wrapper.

This is purely for readability and simplification and should have no
functional impact, because the code touched here is before clock is
registered via CCF, so there is no concurrency issue.

Suggested-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Patchwork: https://patchwork.freedesktop.org/patch/638323/
Link: https://lore.kernel.org/r/20250219-drm-msm-phy-pll-cfg-reg-v5-1-d28973fa513a@linaro.org
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/dsi: Add check for devm_kstrdup()</title>
<updated>2025-02-26T10:15:49Z</updated>
<author>
<name>Haoxiang Li</name>
</author>
<published>2025-02-19T04:07:12Z</published>
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<id>urn:sha1:52b3f0e118b1700e5c60ff676a1f522ce44fadc8</id>
<content type='text'>
Add check for the return value of devm_kstrdup() in
dsi_host_parse_dt() to catch potential exception.

Fixes: 958d8d99ccb3 ("drm/msm/dsi: parse vsync source from device tree")
Cc: stable@vger.kernel.org
Signed-off-by: Haoxiang Li &lt;haoxiang_li2024@163.com&gt;
Reviewed-by: Abhinav Kumar &lt;quic_abhinavk@quicinc.com&gt;
Patchwork: https://patchwork.freedesktop.org/patch/638297/
Link: https://lore.kernel.org/r/20250219040712.2598161-1-haoxiang_li2024@163.com
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/dsi: Allow values of 10 and 12 for bits per component</title>
<updated>2025-02-26T10:15:49Z</updated>
<author>
<name>Eugene Lepshy</name>
</author>
<published>2025-02-17T22:24:30Z</published>
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<id>urn:sha1:b0e71c2637d1b99ff7093582cd3c9f0960619878</id>
<content type='text'>
The DRM DSC helper has various bits_per_component values - not just 8.
But the DSC 1.1 block supports only 8, 10, and 12. Extend the guard
accordingly and add a comment noting this limitation.

Signed-off-by: Eugene Lepshy &lt;fekz115@gmail.com&gt;
Co-developed-by: Danila Tikhonov &lt;danila@jiaxyga.com&gt;
Signed-off-by: Danila Tikhonov &lt;danila@jiaxyga.com&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Patchwork: https://patchwork.freedesktop.org/patch/637831/
Link: https://lore.kernel.org/r/20250217222431.82522-4-danila@jiaxyga.com
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/dsi: Set PHY usescase (and mode) before registering DSI host</title>
<updated>2025-02-26T10:15:49Z</updated>
<author>
<name>Marijn Suijten</name>
</author>
<published>2025-02-17T11:17:42Z</published>
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<id>urn:sha1:660c396c98c061f9696bebacc178b74072e80054</id>
<content type='text'>
Ordering issues here cause an uninitialized (default STANDALONE)
usecase to be programmed (which appears to be a MUX) in some cases
when msm_dsi_host_register() is called, leading to the slave PLL in
bonded-DSI mode to source from a clock parent (dsi1vco) that is off.

This should seemingly not be a problem as the actual dispcc clocks from
DSI1 that are muxed in the clock tree of DSI0 are way further down, this
bit still seems to have an effect on them somehow and causes the right
side of the panel controlled by DSI1 to not function.

In an ideal world this code is refactored to no longer have such
error-prone calls "across subsystems", and instead model the "PLL src"
register field as a regular mux so that changing the clock parents
programmatically or in DTS via `assigned-clock-parents` has the
desired effect.
But for the avid reader, the clocks that we *are* muxing into DSI0's
tree are way further down, so if this bit turns out to be a simple mux
between dsiXvco and out_div, that shouldn't have any effect as this
whole tree is off anyway.

Fixes: 57bf43389337 ("drm/msm/dsi: Pass down use case to PHY")
Reviewed-by: Abhinav Kumar &lt;quic_abhinavk@quicinc.com&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Signed-off-by: Marijn Suijten &lt;marijn.suijten@somainline.org&gt;
Patchwork: https://patchwork.freedesktop.org/patch/637650/
Link: https://lore.kernel.org/r/20250217-drm-msm-initial-dualpipe-dsc-fixes-v3-2-913100d6103f@somainline.org
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/dsi: Use existing per-interface slice count in DSC timing</title>
<updated>2025-02-26T10:15:48Z</updated>
<author>
<name>Marijn Suijten</name>
</author>
<published>2025-02-17T11:17:41Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=14ad809ceb66d0874cbe4bd5ca9edf0de8d9ad96'/>
<id>urn:sha1:14ad809ceb66d0874cbe4bd5ca9edf0de8d9ad96</id>
<content type='text'>
When configuring the timing of DSI hosts (interfaces) in
dsi_timing_setup() all values written to registers are taking
bonded-mode into account by dividing the original mode width by 2
(half the data is sent over each of the two DSI hosts), but the full
width instead of the interface width is passed as hdisplay parameter to
dsi_update_dsc_timing().

Currently only msm_dsc_get_slices_per_intf() is called within
dsi_update_dsc_timing() with the `hdisplay` argument which clearly
documents that it wants the width of a single interface (which, again,
in bonded DSI mode is half the total width of the mode) resulting in all
subsequent values to be completely off.

However, as soon as we start to pass the halved hdisplay
into dsi_update_dsc_timing() we might as well discard
msm_dsc_get_slices_per_intf() since the value it calculates is already
available in dsc-&gt;slice_count which is per-interface by the current
design of MSM DPU/DSI implementations and their use of the DRM DSC
helpers.

Fixes: 08802f515c3c ("drm/msm/dsi: Add support for DSC configuration")
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Reviewed-by: Jessica Zhang &lt;quic_jesszhan@quicinc.com&gt;
Signed-off-by: Marijn Suijten &lt;marijn.suijten@somainline.org&gt;
Patchwork: https://patchwork.freedesktop.org/patch/637648/
Link: https://lore.kernel.org/r/20250217-drm-msm-initial-dualpipe-dsc-fixes-v3-1-913100d6103f@somainline.org
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/dsi: Drop unnecessary -ENOMEM message</title>
<updated>2025-02-26T10:15:48Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
</author>
<published>2025-02-14T13:17:47Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=b39e7014ed3121f980d55097ec2bd9ecee3adc83'/>
<id>urn:sha1:b39e7014ed3121f980d55097ec2bd9ecee3adc83</id>
<content type='text'>
Kernel core already prints detailed report about memory allocation
failures, so drivers should not have their own error messages.

Reviewed-by: Abhinav Kumar &lt;quic_abhinavk@quicinc.com&gt;
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Patchwork: https://patchwork.freedesktop.org/patch/637308/
Link: https://lore.kernel.org/r/20250214-drm-msm-cleanups-v2-4-1bec50f37dc1@linaro.org
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/dsi: Minor whitespace and style cleanup</title>
<updated>2025-02-26T10:15:48Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
</author>
<published>2025-02-14T13:17:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=cce156257ed3414ab104dc2360c5c4eb03ce7ed3'/>
<id>urn:sha1:cce156257ed3414ab104dc2360c5c4eb03ce7ed3</id>
<content type='text'>
Cleanup few obvious kernel coding style violations: missing or
unnecessary braces in 'if-else', unnecessary break lines, incorrect
breaking of long function declarations, unnecessary 'else' after a
'return'.  No functional impact expected.

Reviewed-by: Abhinav Kumar &lt;quic_abhinavk@quicinc.com&gt;
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Patchwork: https://patchwork.freedesktop.org/patch/637305/
Link: https://lore.kernel.org/r/20250214-drm-msm-cleanups-v2-3-1bec50f37dc1@linaro.org
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
</content>
</entry>
<entry>
<title>drm/msm/dsi: Simplify with dev_err_probe()</title>
<updated>2025-02-26T10:15:48Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
</author>
<published>2025-02-14T13:17:45Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d5bc3c3389d7850a3207f2a638966db6ecd30a5e'/>
<id>urn:sha1:d5bc3c3389d7850a3207f2a638966db6ecd30a5e</id>
<content type='text'>
dsi_get_config(), dsi_clk_init() and msm_dsi_host_init() are called only
from platform driver probe function, so using dev_err_probe() is both
appropriate and beneficial:
 - Properly marks device deferred probe status,
 - Avoids dmesg flood on probe deferrals,
 - Already incorporates printing ERR value,
 - Shows device name (in contrast to pr_err()),
 - Makes code smaller and simpler.

Reviewed-by: Abhinav Kumar &lt;quic_abhinavk@quicinc.com&gt;
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Patchwork: https://patchwork.freedesktop.org/patch/637306/
Link: https://lore.kernel.org/r/20250214-drm-msm-cleanups-v2-2-1bec50f37dc1@linaro.org
Signed-off-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
</content>
</entry>
</feed>
