kernel.git/drivers/gpu/drm/i915/soc, branch linux-rolling-lts

drm/i915/display: add intel_display_device_present()

2025-09-09T06:32:01Z

Add a proper function for display && HAS_DISPLAY(display) to hide indirect struct intel_display access via the macro from a number of places outside of display. This makes struct intel_display * an opaque pointer in these places. All HAS_DISPLAY() usage is now constrained within display. Reviewed-by: Ville Syrjälä Link: https://lore.kernel.org/r/20250903090408.3492875-1-jani.nikula@intel.com Signed-off-by: Jani Nikula

drm/i915/dram: Print memory details even if something went wrong

2025-09-05T11:37:32Z

Print the memory details even if the detection failed in some way but we continued the driver initialization anyway. It'll be easier to debug issues if we at least know what the final results were. And while at it also print the number of PSF GV points. Previously we only printed the QGV points. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-9-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula

drm/i915/dram: Don't call skl_get_dram_info()/skl_get_dram_type() on icl

2025-09-05T11:37:32Z

Currently the icl codepaths first determine the memory type from the memory controller registers (via skl_get_dram_info()->skl_get_dram_type()) and then overwrite the results with icl_pcode_read_mem_global_info(). Get rid of the pointless (and potentially incorrect) skl_get_dram_type() stuff. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-8-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula

drm/i915/dram: Move 16Gb DIMM detection fully to the skl/icl codepaths

2025-09-05T11:37:32Z

We are incorrectly applying the 16Gb DIMM w/a (adding 1 extra usec to WM0 latency) on MTL+ even though the w/a is only needed for SKL/ICL. The current way of setting this is up is a bit of a disaster: 1. always set has_16gb_dimms=true for all platforms except BXT/GLK 2. has_16gb_dimms potentially gets overwritten with something else * BXT/GLK don't do anything since we never set has_16gb_dimms to begin with * skl_get_dram_info() overwrites has_16gb_dimms with the actual detection results for SKL/ICL/derivatives * gen12_get_dram_info() (correctly) resets has_16gb_dimms for TGL/ADL/derivatives * xelpdp_get_dram_info() doesn't do anything, leaving has_16gb_dimms incorrectly set for MTL+ Clean up the whole mess by only setting has_16gb_dimms in the SKL/ICL codepaths where we have the actual detection code for it. This avois applying the w/a incorrectly on MTL+. v2: Rewrite commit msg (Jani) Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-6-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula

drm/i915/dram: s/wm_lv0.../has_16gb_dimms/

2025-09-05T11:37:32Z

The DRAM code shouldn't know anything about watermarks. Rename wm_lv_0_adjust_needed to has_16gb_dimms. How this gets used is up to the watermark code. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-5-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula

drm/i915/dram: Pack dram_info better

2025-09-05T11:37:32Z

struct dram_info has two holes in the middle. Shuffle things around to plug them. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-4-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula

drm/i915/dram: Use intel_dram_type_str() for pnv

2025-09-05T11:37:32Z

Replace the hand rolled PNV memory type printk string stuff with intel_dram_type_str(). Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-3-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula

drm/i915/dram: Populate PNV memory type accurately

2025-09-05T11:37:32Z

If PNV doesn't have DDR3 then it has DDR2. Add the appropriate memory type for it. No functional change since we currently only care about the DDR3 vs. not difference. Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula

drm/i915/dram: move fsb_freq and mem_freq to dram info

2025-08-19T08:20:40Z

Store fsb_freq and mem_freq in dram info the same way we do for other memory info on later platforms for a slightly more unified approach. This allows us to remove fsb_freq, mem_freq and is_ddr3 members from struct drm_i915_private and struct xe_device. Reviewed-by: Rodrigo Vivi Link: https://lore.kernel.org/r/a38c4b105ba9098fa0b128cb86cd4eb63bcc27e8.1755511595.git.jani.nikula@intel.com Signed-off-by: Jani Nikula

drm/i915/dram: bypass fsb/mem freq detection on dg2 and no display

2025-08-19T08:20:40Z

Non-display now calls the intel_fsb_freq() and intel_mem_freq() functions, so we don't have to have the frequencies initialized for dg2 or non-display cases. This is in preparation for unifying the pre-gen9 handling in dram info. DG2 remains a special case as described in commit 5eb6bf0b44e7 ("drm/i915/dg2: Don't read DRAM info"). v2: Rebase Reviewed-by: Rodrigo Vivi Link: https://lore.kernel.org/r/7bfed06d431354f3918ea73d43a2ec8ed9426a76.1755511595.git.jani.nikula@intel.com Signed-off-by: Jani Nikula