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<title>kernel.git/drivers/gpu/drm/i915/intel_ringbuffer.c, branch linux-3.15.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.15.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.15.y'/>
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<updated>2014-04-25T13:01:14Z</updated>
<entry>
<title>drm/i915: Move all ring resets before setting the HWS page</title>
<updated>2014-04-25T13:01:14Z</updated>
<author>
<name>Chris Wilson</name>
</author>
<published>2014-04-02T15:36:07Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=78f2975eec9faff353a6194e854d3d39907bab68'/>
<id>urn:sha1:78f2975eec9faff353a6194e854d3d39907bab68</id>
<content type='text'>
In commit a51435a3137ad8ae75c288c39bd2d8b2696bae8f
Author: Naresh Kumar Kachhi &lt;naresh.kumar.kachhi@intel.com&gt;
Date:   Wed Mar 12 16:39:40 2014 +0530

    drm/i915: disable rings before HW status page setup

we reordered stopping the rings to do so before we set the HWS register.
However, there is an extra workaround for g45 to reset the rings twice,
and for consistency we should apply that workaround before setting the
HWS to be sure that the rings are truly stopped.

Reference: http://lkml.kernel.org/r/20140423202248.GA3621@amd.pavel.ucw.cz
Tested-by: Pavel Machek &lt;pavel@ucw.cz&gt;
Cc: Naresh Kumar Kachhi &lt;naresh.kumar.kachhi@intel.com&gt;
Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Reviewed-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/ringbuffer: prefer struct drm_i915_private to drm_i915_private_t</title>
<updated>2014-03-31T13:32:56Z</updated>
<author>
<name>Jani Nikula</name>
</author>
<published>2014-03-31T11:27:19Z</published>
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<id>urn:sha1:4640c4ff083d3294a41607f5e512bf1ec09bb161</id>
<content type='text'>
No functional changes.

Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915: Broadwell expands ACTHD to 64bit</title>
<updated>2014-03-28T17:33:14Z</updated>
<author>
<name>Chris Wilson</name>
</author>
<published>2014-03-21T12:41:53Z</published>
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<id>urn:sha1:508774452d657e8d307e1c52682ffcdf743e992d</id>
<content type='text'>
As Broadwell has an increased virtual address size, it requires more
than 32 bits to store offsets into its address space. This includes the
debug registers to track the current HEAD of the individual rings, which
may be anywhere within the per-process address spaces. In order to find
the full location, we need to read the high bits from a second register.
We then also need to expand our storage to keep track of the larger
address.

v2: Carefully read the two registers to catch wraparound between
    the reads.
v3: Use a WARN_ON rather than loop indefinitely on an unstable
    register read.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Ben Widawsky &lt;benjamin.widawsky@intel.com&gt;
Cc: Timo Aaltonen &lt;tjaalton@ubuntu.com&gt;
Cc: Tvrtko Ursulin &lt;tvrtko.ursulin@linux.intel.com&gt;
Reviewed-by: Ben Widawsky &lt;ben@bwidawsk.net&gt;
[danvet: Drop spurious hunk which conflicted.]
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915: Remove the enabling of VS_TIMER_DISPATCH bit in MI MODE reg</title>
<updated>2014-03-28T17:31:59Z</updated>
<author>
<name>Akash Goel</name>
</author>
<published>2014-03-25T12:31:50Z</published>
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<id>urn:sha1:61a563a2a6ada193a022666b51ec8bb64112efc5</id>
<content type='text'>
This patch Removes the VS_TIMER_DISPATCH bit enable in MI MODE reg for
platforms &gt; Gen6.
VS_TIMER_DISPATCH bit enable was earlier required as a part of
WA 'WaTimedSingleVertexDispatch', which is now applicable only to
platforms &lt; Gen7.

v2: Enhancing the scope of the patch to full Gen7 (Chris)

v3: Modifying the WA condition to the cover the applicable platforms,
and adding the WA name in comments. (Ville)

Signed-off-by: Akash Goel &lt;akash.goel@intel.com&gt;
Signed-off-by: Sourab Gupta &lt;sourab.gupta@intel.com&gt;
Tested-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt; # ivb, hsw -Chris
Reviewed-by: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915/bdw: The TLB invalidation mechanism has been removed from INSTPM</title>
<updated>2014-03-13T02:52:31Z</updated>
<author>
<name>Damien Lespiau</name>
</author>
<published>2014-03-13T01:40:28Z</published>
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<id>urn:sha1:dc616b89dbc4bb6a99884d214bd1ed1e0eef59a0</id>
<content type='text'>
While wandering in the spec, I noticed that BDW removes those 2 bits
from INSTPM. I couldn't find any direct way to invalidate the TLB (ie
without the ring working already). Maybe someone will be more lucky.

At least, we now know we may be a problem.

Signed-off-by: Damien Lespiau &lt;damien.lespiau@intel.com&gt;
Reviewed-by: Ben Widawsky &lt;ben@bwidawsk.net&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915: warn if ring is active before sync flush</title>
<updated>2014-03-12T15:10:55Z</updated>
<author>
<name>Naresh Kumar Kachhi</name>
</author>
<published>2014-03-12T11:09:42Z</published>
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<id>urn:sha1:02f6a1e750df8201561171c47472435557a65864</id>
<content type='text'>
Based on Bspec the command parser must be stopped prior to
issuing sync flush. This should be done by the caller of
intel_ring_setup_status_page. Patch adds a warning if it is
not done.

v2: rebased based on new patch (wait for ring to become idle)

Signed-off-by: Naresh Kumar Kachhi &lt;naresh.kumar.kachhi@intel.com&gt;
Reviewed-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915: wait for rings to become idle once disabled</title>
<updated>2014-03-12T15:04:19Z</updated>
<author>
<name>Naresh Kumar Kachhi</name>
</author>
<published>2014-03-12T11:09:41Z</published>
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<id>urn:sha1:e9fea5747d2b3dbff47a8790c1cc4d7af80051d6</id>
<content type='text'>
make sure we wait for rings to become idle once they are
disabled. In case of timeout print an error message

Signed-off-by: Naresh Kumar Kachhi &lt;naresh.kumar.kachhi@intel.com&gt;
[danvet: Frob patch as suggested by Chris.]
Reviewed-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915: disable rings before HW status page setup</title>
<updated>2014-03-12T15:00:41Z</updated>
<author>
<name>Naresh Kumar Kachhi</name>
</author>
<published>2014-03-12T11:09:40Z</published>
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<id>urn:sha1:a51435a3137ad8ae75c288c39bd2d8b2696bae8f</id>
<content type='text'>
Rings should be idle before issuing sync_flush
(in intel_ring_setup_status_page). This patch moves the ring
disabling before doing the HW status page setup.

Signed-off-by: Naresh Kumar Kachhi &lt;naresh.kumar.kachhi@intel.com&gt;
Reviewed-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>Merge tag 'v3.14-rc6' into drm-intel-next-queued</title>
<updated>2014-03-10T20:43:46Z</updated>
<author>
<name>Daniel Vetter</name>
</author>
<published>2014-03-10T20:43:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e8e6e6012d68c4967e8f26fdd39ac95c247d4789'/>
<id>urn:sha1:e8e6e6012d68c4967e8f26fdd39ac95c247d4789</id>
<content type='text'>
Linux 3.14-rc6

I need the hdmi/dvi-dual link fixes in 3.14 to avoid ugly conflicts
when merging Ville's new hdmi cloning support into my -next tree

Conflicts:
	drivers/gpu/drm/i915/Makefile
	drivers/gpu/drm/i915/intel_dp.c

Makefile cleanup conflicts with an acpi build fix, intel_dp.c is
trivial.

Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
<entry>
<title>drm/i915: Implement command buffer parsing logic</title>
<updated>2014-03-07T21:37:00Z</updated>
<author>
<name>Brad Volkin</name>
</author>
<published>2014-02-18T18:15:46Z</published>
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<id>urn:sha1:351e3db2b3631556607d0d94fa26df8e2e0d0fd8</id>
<content type='text'>
The command parser scans batch buffers submitted via execbuffer ioctls before
the driver submits them to hardware. At a high level, it looks for several
things:

1) Commands which are explicitly defined as privileged or which should only be
   used by the kernel driver. The parser generally rejects such commands, with
   the provision that it may allow some from the drm master process.
2) Commands which access registers. To support correct/enhanced userspace
   functionality, particularly certain OpenGL extensions, the parser provides a
   whitelist of registers which userspace may safely access (for both normal and
   drm master processes).
3) Commands which access privileged memory (i.e. GGTT, HWS page, etc). The
   parser always rejects such commands.

See the overview comment in the source for more details.

This patch only implements the logic. Subsequent patches will build the tables
that drive the parser.

v2: Don't set the secure bit if the parser succeeds
Fail harder during init
Makefile cleanup
Kerneldoc cleanup
Clarify module param description
Convert ints to bools in a few places
Move client/subclient defs to i915_reg.h
Remove the bits_count field

OTC-Tracker: AXIA-4631
Change-Id: I50b98c71c6655893291c78a2d1b8954577b37a30
Signed-off-by: Brad Volkin &lt;bradley.d.volkin@intel.com&gt;
Reviewed-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
[danvet: Appease checkpatch.]
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
</content>
</entry>
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