kernel.git/drivers/gpu/drm/i915/intel_fb.c, branch linux-3.3.y

drm/i915: Hold mode_config lock whilst changing mode for lastclose()

2012-04-22T22:39:18Z

commit c291be9dba370ba696a0d482249a212cf5c15f45 upstream. Upon lastclose(), we switch back to the fbcon configuration. This requires taking the mode_config lock in order to serialise the change with output probing elsewhere. Reported-by: Oleksij Rempel References: https://bugs.freedesktop.org/show_bug.cgi?id=48652 Signed-off-by: Chris Wilson Acked-by: Jesse Barnes Signed-Off-by: Daniel Vetter Signed-off-by: Greg Kroah-Hartman

drm/i915: suspend fbdev device around suspend/hibernate

2012-04-02T17:32:22Z

commit 3fa016a0b5c5237e9c387fc3249592b2cb5391c6 upstream. Looking at hibernate overwriting I though it looked like a cursor, so I tracked down this missing piece to stop the cursor blink timer. I've no idea if this is sufficient to fix the hibernate problems people are seeing, but please test it. Both radeon and nouveau have done this for a long time. I've run this personally all night hib/resume cycles with no fails. Reviewed-by: Keith Packard Reported-by: Petr Tesarik Reported-by: Stanislaw Gruszka Reported-by: Lots of misc segfaults after hibernate across the world. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=37142 Tested-by: Dave Airlie Tested-by: Bojan Smojver Tested-by: Andreas Hartmann Signed-off-by: Dave Airlie Signed-off-by: Greg Kroah-Hartman

drm/i915: add SNB and IVB video sprite support v6

2012-01-03T17:31:09Z

The video sprites support various video surface formats natively and can handle scaling as well. So add support for them using the new DRM core sprite support functions. v2: use drm specific fourcc header and defines v3: address Daniel's comments: - don't take struct mutex around register access (only needed for regs in the GT power well) - don't hold struct mutex across vblank waits - fix up update_plane API (pass obj instead of GTT offset) - add interlaced defines for sprite regs - drop unnecessary 'reg' variables - comment double buffered reg flushing Also fix w/h confusion when writing the scaling reg. v4: more fixes, address more comments from Daniel, and include Hai's fix - prevent divide by zero in scaling calculation (Hai Lan) - update to Ville's new DRM_FORMAT_* types - fix sprite watermark handling (calc based on CRTC size, separate from normal display wm) - remove private refcounts now that the fb cleanups handles things v5: add linear surface support v6: remove color key clearing & setting from update_plane For this version, I tested DPMS since it came up in the last review; DPMS off/on works ok when a video player is working under X, but for power saving we'll probably want to do something smarter. I'll leave that for a separate patch on top. Likewise with the refcounting/fb layer handling, which are really separate cleanups. Reviewed-by: Daniel Vetter Signed-off-by: Jesse Barnes Signed-off-by: Keith Packard

drm: Replace pitch with pitches[] in drm_framebuffer

2011-12-20T10:06:27Z

Otherwise each driver would need to keep the information inside their own framebuffer object structure. Also add offsets[]. BOs on the other hand are driver specific, so those can be kept in driver specific structures. Signed-off-by: Ville Syrjälä Signed-off-by: Dave Airlie

drm: add an fb creation ioctl that takes a pixel format v5

2011-11-15T19:53:23Z

To properly support the various plane formats supported by different hardware, the kernel must know the pixel format of a framebuffer object. So add a new ioctl taking a format argument corresponding to a fourcc name from the new drm_fourcc.h header file. Implement the fb creation hooks in terms of the new mode_fb_cmd2 using helpers where the old bpp/depth values are needed. v2: create DRM specific fourcc header file for sharing with libdrm etc v3: fix rebase failure and use DRM fourcc codes in intel_display.c and update commit message v4: make fb_cmd2 handle field into an array for multi-object formats pull in Ville's fix for the memcpy in drm_plane_init apply Ville's cleanup to zero out fb_cmd2 arg in drm_mode_addfb v5: add 'flags' field for interlaced support (from Ville) Signed-off-by: Ville Syrjälä Acked-by: Alan Cox Reviewed-by: Rob Clark Signed-off-by: Jesse Barnes Signed-off-by: Dave Airlie

drm/i915: restore only the mode of this driver on lastclose (v2)

2011-04-27T07:51:59Z

i915 calls the panic handler function on last close to reset the modes, however this is a really bad idea for multi-gpu machines, esp shareable gpus machines. So add a new entry point for the driver to just restore its own fbcon mode. v2: move code into fb helper, fix panic code to block mode change on powered off GPUs. [airlied: this hits drm core and I wrote it and it was reviewed on intel-gfx so really I signed it off twice ;-).] Signed-off-by: Chris Wilson Signed-off-by: Dave Airlie

Revert "drm: Update fbdev fb_fix_screeninfo"

2011-01-15T00:10:28Z

This reverts commit dfe63bb0ad9810db13aab0058caba97866e0a681. This commit was causing nouveau not to work properly, for -rc1 I'd prefer it worked and we can look if this is useful for 2.6.39. Cc: James Simmons Signed-off-by: Dave Airlie Signed-off-by: Linus Torvalds

drm/i915: Use the mappable sizes determined by GTT for consistency.

2011-01-11T20:35:40Z

There should be no difference, but we can eliminate redundant code. Signed-off-by: Chris Wilson

drm: Update fbdev fb_fix_screeninfo

2011-01-07T03:44:40Z

If you change the color depth via fbset or some other framebuffer aware userland application struct fb_fix_screeninfo is not updated to this new information. This patch fixes this issue. Also the function is changed to just pass in struct drm_framebuffer so in the future we could use more fields. I'm hoping some day fix->smem* could be set here :-) Signed-off-by: James Simmons Signed-off-by: Dave Airlie

Merge remote branch 'intel/drm-intel-next' of /ssd/git/drm-next into drm-core-next

2010-12-21T23:48:54Z

* 'intel/drm-intel-next' of /ssd/git/drm-next: (771 commits) drm/i915: Undo "Uncouple render/power ctx before suspending" drm/i915: Allow the application to choose the constant addressing mode drm/i915: dynamic render p-state support for Sandy Bridge drm/i915: Enable EI mode for RCx decision making on Sandybridge drm/i915/sdvo: Border and stall select became test bits in gen5 drm/i915: Add Guess-o-matic for pageflip timestamping. drm/i915: Add support for precise vblank timestamping (v2) drm/i915: Add frame buffer compression on Sandybridge drm/i915: Add self-refresh support on Sandybridge drm/i915: Wait for vblank before unpinning old fb Revert "drm/i915: Avoid using PIPE_CONTROL on Ironlake" drm/i915: Pass clock limits down to PLL matcher drm/i915: Poll for seqno completion if IRQ is disabled drm/i915/ringbuffer: Make IRQ refcnting atomic agp/intel: Fix missed cached memory flags setting in i965_write_entry() drm/i915/sdvo: Only use the SDVO pin if it is in the valid range drm/i915: Enable RC6 autodownclocking on Sandybridge drm/i915: Terminate the FORCE WAKE after we have finished reading drm/i915/gtt: Clear the cachelines upon resume drm/i915: Restore GTT mapping first upon resume ...