<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/gpu/drm/i915/i915_cmd_parser.c, branch linux-4.12.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.12.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.12.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2017-03-10T13:02:34Z</updated>
<entry>
<title>drm/i915/cmdparser: Limit clflush to active cachelines</title>
<updated>2017-03-10T13:02:34Z</updated>
<author>
<name>Chris Wilson</name>
</author>
<published>2017-03-10T11:55:18Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=504ae4024131c5a01c3ce8382d49b801375e039c'/>
<id>urn:sha1:504ae4024131c5a01c3ce8382d49b801375e039c</id>
<content type='text'>
We only need to clflush those cachelines that we have validated to be
read by the GPU. Userspace typically fills the batch length in
correctly, the exceptions tend to be explicit tests within igt.

v2: Use ptr_mask_bits() to make Mika happy
v3: cmd is not advanced on MI_BBE, so make sure to include an extra
dword in the clflush.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Mika Kuoppala &lt;mika.kuoppala@linux.intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20170310115518.13832-1-chris@chris-wilson.co.uk
</content>
</entry>
<entry>
<title>drm/i915: Consolidate checks for memcpy-from-wc support</title>
<updated>2017-01-06T16:02:07Z</updated>
<author>
<name>Chris Wilson</name>
</author>
<published>2017-01-06T15:20:09Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c4d3ae6852bd9f024611d2e8722736ca553e1e43'/>
<id>urn:sha1:c4d3ae6852bd9f024611d2e8722736ca553e1e43</id>
<content type='text'>
In order to silence sparse:

../drivers/gpu/drm/i915/i915_gpu_error.c:200:39: warning: Using plain integer as NULL pointer

add a helper to check whether we have sse4.1 and that the desired
alignment is valid for acceleration.

v2: Explain the macros and split the two use cases between
i915_has_memcpy_from_wc() and i915_can_memcpy_from_wc().

Reported-by: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Reviewed-by: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20170106152013.24684-1-chris@chris-wilson.co.uk
</content>
</entry>
<entry>
<title>drm/i915: Use the precomputed value for whether to enable command parsing</title>
<updated>2016-11-24T13:52:34Z</updated>
<author>
<name>Chris Wilson</name>
</author>
<published>2016-11-24T12:58:51Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=41736a8e3331a67445b271e73be39536c498659e'/>
<id>urn:sha1:41736a8e3331a67445b271e73be39536c498659e</id>
<content type='text'>
As i915.enable_cmd_parser is an unsafe option, make it read-only at
runtime. Now that it is constant, we can use the value determined during
initialisation as to whether we need the cmdparser at execbuffer time.

v2: Remove the inline for its single user, it is clear enough (and
shorter) without!

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Reviewed-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20161124125851.6615-1-chris@chris-wilson.co.uk
</content>
</entry>
<entry>
<title>drm/i915: kick out cmd_parser specific structs from i915_drv.h</title>
<updated>2016-11-24T11:28:39Z</updated>
<author>
<name>Matthew Auld</name>
</author>
<published>2016-11-23T23:02:27Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=007873b30b9001348c0dfc96deb9db220a3be116'/>
<id>urn:sha1:007873b30b9001348c0dfc96deb9db220a3be116</id>
<content type='text'>
No sense in keeping the cmd_descriptor and cmd_table structs in
i915_drv.h, now that they are no longer referenced externally.

Cc: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Signed-off-by: Matthew Auld &lt;matthew.auld@intel.com&gt;
Reviewed-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Signed-off-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/1479942147-9837-1-git-send-email-matthew.auld@intel.com
</content>
</entry>
<entry>
<title>drm/i915: cleanup use of INSTR_CLIENT_MASK</title>
<updated>2016-11-24T11:28:29Z</updated>
<author>
<name>Matthew Auld</name>
</author>
<published>2016-11-14T22:39:34Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e3f51ece02f877d2ce9619aa8d5919db56f39582'/>
<id>urn:sha1:e3f51ece02f877d2ce9619aa8d5919db56f39582</id>
<content type='text'>
Doing cmd_header &gt;&gt; 29 to extract our 3-bit client value where we know
cmd_header is a u32 shouldn't then also require the use of a mask. So
remove the redundant operation and get rid of INSTR_CLIENT_MASK now that
there are no longer any users.

Cc: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Signed-off-by: Matthew Auld &lt;matthew.auld@intel.com&gt;
Reviewed-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Signed-off-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/1479163174-29686-1-git-send-email-matthew.auld@intel.com
</content>
</entry>
<entry>
<title>drm/i915: don't whitelist oacontrol in cmd parser</title>
<updated>2016-11-22T13:32:42Z</updated>
<author>
<name>Robert Bragg</name>
</author>
<published>2016-11-08T12:51:48Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=10ff401df041e57afc2b1619cd252b86d0ae5f30'/>
<id>urn:sha1:10ff401df041e57afc2b1619cd252b86d0ae5f30</id>
<content type='text'>
Being able to program OACONTROL from a non-privileged batch buffer is
not sufficient to be able to configure the OA unit. This was originally
allowed to help enable Mesa to expose OA counters via the
INTEL_performance_query extension, but the current implementation based
on programming OACONTROL via a batch buffer isn't able to report useable
data without a more complete OA unit configuration. Mesa handles the
possibility that writes to OACONTROL may not be allowed and so only
advertises the extension after explicitly testing that a write to
OACONTROL succeeds. Based on this; removing OACONTROL from the whitelist
should be ok for userspace.

Removing this simplifies adding a new kernel api for configuring the OA
unit without needing to consider the possibility that userspace might
trample on OACONTROL state which we'd like to start managing within
the kernel instead. In particular running any Mesa based GL application
currently results in clearing OACONTROL when initializing which would
disable the capturing of metrics.

v2:
    This bumps the command parser version from 8 to 9, as the change is
    visible to userspace.

Signed-off-by: Robert Bragg &lt;robert@sixbynine.org&gt;
Reviewed-by: Matthew Auld &lt;matthew.auld@intel.com&gt;
Reviewed-by: Sourab Gupta &lt;sourab.gupta@intel.com&gt;Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20161108125148.25007-1-robert@sixbynine.org
</content>
</entry>
<entry>
<title>drm/i915: return EACCES for check_cmd() failures</title>
<updated>2016-11-22T13:31:28Z</updated>
<author>
<name>Robert Bragg</name>
</author>
<published>2016-11-07T19:49:49Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=9bbeaedb664a6d3e1cfbe6b0c2f07bf667512456'/>
<id>urn:sha1:9bbeaedb664a6d3e1cfbe6b0c2f07bf667512456</id>
<content type='text'>
check_cmd() is checking whether a command adheres to certain
restrictions that ensure it's safe to execute within a privileged batch
buffer. Returning false implies a privilege problem, not that the
command is invalid.

The distinction makes the difference between allowing the buffer to be
executed as an unprivileged batch buffer or returning an EINVAL error to
userspace without executing anything.

In a case where userspace may want to test whether it can successfully
write to a register that needs privileges the distinction may be
important and an EINVAL error may be considered fatal.

In particular this is currently true for Mesa, which includes a test for
whether OACONTROL can be written too, but Mesa treats any error when
flushing a batch buffer as fatal, calling exit(1).

As it is currently Mesa can gracefully handle a failure to write to
OACONTROL if the command parser is disabled, but if we were to remove
OACONTROL from the parser's whitelist then the returned EINVAL would
break Mesa applications as they attempt an OACONTROL write.

This bumps the command parser version from 7 to 8, as the change is
visible to userspace.

Signed-off-by: Robert Bragg &lt;robert@sixbynine.org&gt;
Reviewed-by: Matthew Auld &lt;matthew.auld@intel.com&gt;
Reviewed-by: Sourab Gupta &lt;sourab.gupta@intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20161107194957.3385-4-robert@sixbynine.org
</content>
</entry>
<entry>
<title>drm/i915: rename OACONTROL GEN7_OACONTROL</title>
<updated>2016-11-22T13:29:29Z</updated>
<author>
<name>Robert Bragg</name>
</author>
<published>2016-11-07T19:49:48Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a941795a3aead3765d6f9e12dc1828fe06ba3d5d'/>
<id>urn:sha1:a941795a3aead3765d6f9e12dc1828fe06ba3d5d</id>
<content type='text'>
OACONTROL changes quite a bit for gen8, with some bits split out into a
per-context OACTXCONTROL register. Rename now before adding more gen7 OA
registers

Signed-off-by: Robert Bragg &lt;robert@sixbynine.org&gt;
Reviewed-by: Matthew Auld &lt;matthew.auld@intel.com&gt;
Reviewed-by: Sourab Gupta &lt;sourab.gupta@intel.com&gt;
Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20161107194957.3385-3-robert@sixbynine.org
</content>
</entry>
<entry>
<title>drm/i915: Refactor object page API</title>
<updated>2016-10-28T19:53:46Z</updated>
<author>
<name>Chris Wilson</name>
</author>
<published>2016-10-28T12:58:35Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a4f5ea64f0a818586b9de71803824b43dd01e517'/>
<id>urn:sha1:a4f5ea64f0a818586b9de71803824b43dd01e517</id>
<content type='text'>
The plan is to make obtaining the backing storage for the object avoid
struct_mutex (i.e. use its own locking). The first step is to update the
API so that normal users only call pin/unpin whilst working on the
backing storage.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Reviewed-by: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Reviewed-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20161028125858.23563-12-chris@chris-wilson.co.uk
</content>
</entry>
<entry>
<title>drm/i915: Allocate intel_engine_cs structure only for the enabled engines</title>
<updated>2016-10-14T08:58:43Z</updated>
<author>
<name>Akash Goel</name>
</author>
<published>2016-10-13T17:14:48Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3b3f1650b1ca46a4225e0bf72804779b161e27b6'/>
<id>urn:sha1:3b3f1650b1ca46a4225e0bf72804779b161e27b6</id>
<content type='text'>
With the possibility of addition of many more number of rings in future,
the drm_i915_private structure could bloat as an array, of type
intel_engine_cs, is embedded inside it.
	struct intel_engine_cs engine[I915_NUM_ENGINES];
Though this is still fine as generally there is only a single instance of
drm_i915_private structure used, but not all of the possible rings would be
enabled or active on most of the platforms. Some memory can be saved by
allocating intel_engine_cs structure only for the enabled/active engines.
Currently the engine/ring ID is kept static and dev_priv-&gt;engine[] is simply
indexed using the enums defined in intel_engine_id.
To save memory and continue using the static engine/ring IDs, 'engine' is
defined as an array of pointers.
	struct intel_engine_cs *engine[I915_NUM_ENGINES];
dev_priv-&gt;engine[engine_ID] will be NULL for disabled engine instances.

There is a text size reduction of 928 bytes, from 1028200 to 1027272, for
i915.o file (but for i915.ko file text size remain same as 1193131 bytes).

v2:
- Remove the engine iterator field added in drm_i915_private structure,
  instead pass a local iterator variable to the for_each_engine**
  macros. (Chris)
- Do away with intel_engine_initialized() and instead directly use the
  NULL pointer check on engine pointer. (Chris)

v3:
- Remove for_each_engine_id() macro, as the updated macro for_each_engine()
  can be used in place of it. (Chris)
- Protect the access to Render engine Fault register with a NULL check, as
  engine specific init is done later in Driver load sequence.

v4:
- Use !!dev_priv-&gt;engine[VCS] style for the engine check in getparam. (Chris)
- Kill the superfluous init_engine_lists().

v5:
- Cleanup the intel_engines_init() &amp; intel_engines_setup(), with respect to
  allocation of intel_engine_cs structure. (Chris)

v6:
- Rebase.

v7:
- Optimize the for_each_engine_masked() macro. (Chris)
- Change the type of 'iter' local variable to enum intel_engine_id. (Chris)
- Rebase.

v8: Rebase.

v9: Rebase.

v10:
- For index calculation use engine ID instead of pointer based arithmetic in
  intel_engine_sync_index() as engine pointers are not contiguous now (Chris)
- For appropriateness, rename local enum variable 'iter' to 'id'. (Joonas)
- Use for_each_engine macro for cleanup in intel_engines_init() and remove
  check for NULL engine pointer in cleanup() routines. (Joonas)

v11: Rebase.

Cc: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Signed-off-by: Akash Goel &lt;akash.goel@intel.com&gt;
Reviewed-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Signed-off-by: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/1476378888-7372-1-git-send-email-akash.goel@intel.com
</content>
</entry>
</feed>
