<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/gpu/drm/i915/display/intel_display_debugfs.c, branch linux-5.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.17.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.17.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2021-12-03T11:12:47Z</updated>
<entry>
<title>drm/i915/fbc: Move FBC debugfs stuff into intel_fbc.c</title>
<updated>2021-12-03T11:12:47Z</updated>
<author>
<name>Ville Syrjälä</name>
</author>
<published>2021-11-24T11:36:43Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d2de8ccfb29909272fce4eb5cb2bca4fd878df39'/>
<id>urn:sha1:d2de8ccfb29909272fce4eb5cb2bca4fd878df39</id>
<content type='text'>
In order to encapsulate FBC harder let's just move the debugfs
stuff into intel_fbc.c.

Signed-off-by: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-12-ville.syrjala@linux.intel.com
Acked-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/fbc: Pass i915 instead of FBC instance to FBC underrun stuff</title>
<updated>2021-12-03T11:12:30Z</updated>
<author>
<name>Ville Syrjälä</name>
</author>
<published>2021-11-24T11:36:42Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=32024bb85ec2a8475b89282726121b922caebad9'/>
<id>urn:sha1:32024bb85ec2a8475b89282726121b922caebad9</id>
<content type='text'>
The underrun code doesn't need to know any details about FBC, so
just pass in the whole device rather than a specific FBC instance.
We could make this a bit more fine grained by also passing in the
pipe to intel_fbc_handle_fifo_underrun_irq() and letting the FBC
code figure which FBC instance (if any) is active on said pipe.
But that seems a bit overkill for this so don't bother.

Signed-off-by: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20211124113652.22090-11-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola &lt;mika.kahola@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/debugfs: move debug printing to intel_display_power.c</title>
<updated>2021-11-19T13:12:05Z</updated>
<author>
<name>Jani Nikula</name>
</author>
<published>2021-11-16T17:14:32Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6abf2fc0072b020cdbb9124ea935603b02502e6c'/>
<id>urn:sha1:6abf2fc0072b020cdbb9124ea935603b02502e6c</id>
<content type='text'>
The debugfs should have no special privileges to look into the
implementation guts. Move the actual debug printing of power domains to
intel_display_power.c.

Cc: Imre Deak &lt;imre.deak@intel.com&gt;
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
Reviewed-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Reviewed-by: Imre Deak &lt;imre.deak@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20211116171434.20516-3-jani.nikula@intel.com
</content>
</entry>
<entry>
<title>drm/i915/fbc: Start passing around intel_fbc</title>
<updated>2021-11-11T13:18:11Z</updated>
<author>
<name>Ville Syrjälä</name>
</author>
<published>2021-11-04T14:45:19Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e49a656b924ef125a2b00945a60df39cd09b8c86'/>
<id>urn:sha1:e49a656b924ef125a2b00945a60df39cd09b8c86</id>
<content type='text'>
In preparation for multiple FBC instances start passing around
intel_fbc pointers rather than i915 pointers. And once there are
multiple of these we can't rely on container_of() to get back to
the i915, so we toss in a fbc-&gt;i915 pointer already.

Signed-off-by: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20211104144520.22605-17-ville.syrjala@linux.intel.com
Acked-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
Reviewed-by: Mika Kahola &lt;mika.kahola@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/fbc: Introduce intel_fbc_set_false_color()</title>
<updated>2021-11-11T13:18:11Z</updated>
<author>
<name>Ville Syrjälä</name>
</author>
<published>2021-11-04T14:45:13Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a61cf3883c83d02cc27b18c4cf8f639279587bb0'/>
<id>urn:sha1:a61cf3883c83d02cc27b18c4cf8f639279587bb0</id>
<content type='text'>
Pull the direct FBC register frobbing out from the debugfs code
into the fbc code. Also add a vfunc for this so we don't need
extra platforms checks.

Signed-off-by: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20211104144520.22605-11-ville.syrjala@linux.intel.com
Acked-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
Reviewed-by: Mika Kahola &lt;mika.kahola@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/fbc: Introduce intel_fbc_is_compressing()</title>
<updated>2021-11-11T13:18:11Z</updated>
<author>
<name>Ville Syrjälä</name>
</author>
<published>2021-11-04T14:45:07Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=74e0457a62c697d388b832b0a52dd1e716204019'/>
<id>urn:sha1:74e0457a62c697d388b832b0a52dd1e716204019</id>
<content type='text'>
Move the direct FBC status register reads from the debugfs code
behind an abstract api.

Signed-off-by: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20211104144520.22605-5-ville.syrjala@linux.intel.com
Acked-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
Reviewed-by: Mika Kahola &lt;mika.kahola@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/display: Wait PSR2 get out of deep sleep to update pipe</title>
<updated>2021-10-26T17:30:51Z</updated>
<author>
<name>José Roberto de Souza</name>
</author>
<published>2021-10-05T23:18:51Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=fed98c16f13f4c68fc507384d3429516ef5c3b6d'/>
<id>urn:sha1:fed98c16f13f4c68fc507384d3429516ef5c3b6d</id>
<content type='text'>
Alderlake-P was getting 'max time under evasion' messages when PSR2
is enabled, this is due PIPE_SCANLINE/PIPEDSL returning 0 over a
period of time longer than VBLANK_EVASION_TIME_US.

For PSR1 we had the same issue so intel_psr_wait_for_idle() was
implemented to wait for PSR1 to get into idle state but nothing was
done for PSR2.

For PSR2 we can't only wait for idle state as PSR2 tends to keep
into sleep state(ready to send selective updates).
Waiting for any state below deep sleep proved to be effective in
avoiding the evasion messages and also not wasted a lot of time.

v2:
- dropping the additional wait_for loops, only the _wait_for_atomic()
is necessary
- waiting for states below EDP_PSR2_STATUS_STATE_DEEP_SLEEP

v3:
- dropping intel_wait_for_condition_atomic() function

Cc: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Cc: Gwan-gyeong Mun &lt;gwan-gyeong.mun@intel.com&gt;
Signed-off-by: José Roberto de Souza &lt;jose.souza@intel.com&gt;
Reviewed-by: Gwan-gyeong Mun &lt;gwan-gyeong.mun@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20211005231851.67698-1-jose.souza@intel.com
</content>
</entry>
<entry>
<title>drm/i915: split out vlv sideband to a separate file</title>
<updated>2021-10-14T09:22:55Z</updated>
<author>
<name>Jani Nikula</name>
</author>
<published>2021-10-13T10:11:59Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1eecf31e3c962aabc1e9c5a469cfa2d161e5254d'/>
<id>urn:sha1:1eecf31e3c962aabc1e9c5a469cfa2d161e5254d</id>
<content type='text'>
The VLV/CHV sideband code is pretty distinct from the rest of the
sideband code. Split it out to new vlv_sideband.[ch].

Pure code movement with relevant #include changes, and a tiny checkpatch
fix on top.

Cc: Lucas De Marchi &lt;lucas.demarchi@intel.com&gt;
Cc: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Reviewed-by: Hans de Goede &lt;hdegoede@redhat.com&gt;
Acked-by: Lucas De Marchi &lt;lucas.demarchi@intel.com&gt;
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/755ebbbaf01fc6d306b763b6ef60f45e671ba290.1634119597.git.jani.nikula@intel.com
</content>
</entry>
<entry>
<title>drm/i915/mst: abstract intel_dp_mst_source_support()</title>
<updated>2021-10-08T10:14:25Z</updated>
<author>
<name>Jani Nikula</name>
</author>
<published>2021-10-06T10:16:18Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a94a6d76c9843c3577078ec297caf0d76b6fa12e'/>
<id>urn:sha1:a94a6d76c9843c3577078ec297caf0d76b6fa12e</id>
<content type='text'>
Add a function for checking source MST support. Drop intel_dp-&gt;can_mst
and use intel_dp-&gt;mst_mgr.cbs to indicate the same. It's the single
point of truth without additional state variables. In code, "source
support" is also self-documenting as opposed to the vague "can mst".

Reviewed-by: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20211006101618.22066-1-jani.nikula@intel.com
</content>
</entry>
<entry>
<title>drm/i915/debugfs: pass intel_connector to intel_connector_debugfs_add()</title>
<updated>2021-10-01T10:45:37Z</updated>
<author>
<name>Jani Nikula</name>
</author>
<published>2021-08-30T14:02:22Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0f26c8e23ab33fb85a09695771041f5a6a608939'/>
<id>urn:sha1:0f26c8e23ab33fb85a09695771041f5a6a608939</id>
<content type='text'>
Prefer the intel_ types. No functional changes.

v2: Fix build.

Reviewed-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20210830140222.12228-1-jani.nikula@intel.com
</content>
</entry>
</feed>
