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<title>kernel.git/drivers/gpu/drm/i915/Makefile, branch linux-3.3.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.3.y</id>
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<updated>2012-01-03T17:31:09Z</updated>
<entry>
<title>drm/i915: add SNB and IVB video sprite support v6</title>
<updated>2012-01-03T17:31:09Z</updated>
<author>
<name>Jesse Barnes</name>
</author>
<published>2011-12-13T21:19:38Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=b840d907fcf6d5d5ef91af4518b3dab3a5da0f75'/>
<id>urn:sha1:b840d907fcf6d5d5ef91af4518b3dab3a5da0f75</id>
<content type='text'>
The video sprites support various video surface formats natively and can
handle scaling as well.  So add support for them using the new DRM core
sprite support functions.

v2: use drm specific fourcc header and defines
v3: address Daniel's comments:
  - don't take struct mutex around register access (only needed for
    regs in the GT power well)
  - don't hold struct mutex across vblank waits
  - fix up update_plane API (pass obj instead of GTT offset)
  - add interlaced defines for sprite regs
  - drop unnecessary 'reg' variables
  - comment double buffered reg flushing
  Also fix w/h confusion when writing the scaling reg.
v4: more fixes, address more comments from Daniel, and include Hai's fix
  - prevent divide by zero in scaling calculation (Hai Lan)
  - update to Ville's new DRM_FORMAT_* types
  - fix sprite watermark handling (calc based on CRTC size, separate
    from normal display wm)
  - remove private refcounts now that the fb cleanups handles things
v5: add linear surface support
v6: remove color key clearing &amp; setting from update_plane

For this version, I tested DPMS since it came up in the last review;
DPMS off/on works ok when a video player is working under X, but for
power saving we'll probably want to do something smarter.  I'll leave
that for a separate patch on top.  Likewise with the refcounting/fb
layer handling, which are really separate cleanups.

Reviewed-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
Signed-off-by: Keith Packard &lt;keithp@keithp.com&gt;
</content>
</entry>
<entry>
<title>drm/i915: Split i915_gem_execbuffer into its own file.</title>
<updated>2010-11-25T21:19:25Z</updated>
<author>
<name>Chris Wilson</name>
</author>
<published>2010-11-25T18:00:26Z</published>
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<id>urn:sha1:54cf91dc4e51fd5070a9a2346377493cc38a1ca9</id>
<content type='text'>
A number of dragons have been seen lurking within the execbuffer code.
The first step is then to isolate them from the rest and begin to
scrutinise them in depth. Suggested by Daniel Vetter.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
</content>
</entry>
<entry>
<title>drm/i915: restore gtt on resume in the drm instead of in intel-gtt.ko</title>
<updated>2010-11-23T20:14:46Z</updated>
<author>
<name>Daniel Vetter</name>
</author>
<published>2010-11-05T21:23:30Z</published>
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<id>urn:sha1:76aaf22016caa7764f40e792aaca7b4918312b22</id>
<content type='text'>
This still uses the agp functions to actually reinstate the mappings
(with a gross hack to make agp cooperate), but it wires everything
up correctly for the switchover.

The call to agp_rebind_memory can be dropped because all non-kms drivers
do all their rebinding on EnterVT.

v2: Be more paranoid and flush the chipset cache after restoring gtt
mappings.

Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
</content>
</entry>
<entry>
<title>drm/i915: add _DSM support</title>
<updated>2010-10-08T09:27:43Z</updated>
<author>
<name>Jesse Barnes</name>
</author>
<published>2010-10-07T23:01:13Z</published>
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<id>urn:sha1:723bfd707a97fee06eb3ba4d3e8b4714c29a1064</id>
<content type='text'>
The _DSM method on the integrated graphics device can tell us which
connectors are muxable, so add support for making the call and parsing
out the connector info.

Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
[ickle: fix compiler warnings for using uninitialized 'result' and
downgrade error message for non-switchable devices]
Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
</content>
</entry>
<entry>
<title>drm/i915: Use the VBT from OpRegion when available (v3)</title>
<updated>2010-09-08T09:13:32Z</updated>
<author>
<name>Chris Wilson</name>
</author>
<published>2010-08-19T15:09:23Z</published>
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<id>urn:sha1:44834a67c0082e2cf74b16be91e49108b1432d65</id>
<content type='text'>
It is recommended that we use the Video BIOS tables that were copied
into the OpRegion during POST when initialising the driver. This saves
us from having to furtle around inside the ROM ourselves and possibly
allows the vBIOS to adjust the tables prior to initialisation.

On some systems, such as the Samsung N210, there is no accessible VBIOS
and the only means of finding the VBT is through the OpRegion.

v2: Rearrange the code so that ASLE is enabled along with ACPI
v3: Enable OpRegion parsing even without ACPI

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Matthew Garrett &lt;mjg@redhat.com&gt;
</content>
</entry>
<entry>
<title>drm/i915: Rename i915_opregion.c to intel_opregion.c</title>
<updated>2010-09-08T09:13:31Z</updated>
<author>
<name>Chris Wilson</name>
</author>
<published>2010-08-24T08:02:58Z</published>
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<id>urn:sha1:3b61796785e7b0ca8846b7a709216dceb6e2f68d</id>
<content type='text'>
It's part of the generic Intel driver infrastructure so rename it in
prepreparation for using it for VBT.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
</content>
</entry>
<entry>
<title>drm/i915: Enable aspect/centering panel fitting for Ironlake.</title>
<updated>2010-08-09T18:24:34Z</updated>
<author>
<name>Chris Wilson</name>
</author>
<published>2010-08-07T10:01:28Z</published>
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<id>urn:sha1:1d8e1c75ffa84400758aef9cc59298920b8801f9</id>
<content type='text'>
v2: Hook in DP paths to keep FULLSCREEN panel fitting on eDP.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Reviewed-by: Zhenyu Wang &lt;zhenyuw@linux.intel.com&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
</entry>
<entry>
<title>drm/i915: Move the eviction logic to its own file.</title>
<updated>2010-08-09T18:24:32Z</updated>
<author>
<name>Chris Wilson</name>
</author>
<published>2010-08-07T10:01:23Z</published>
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<id>urn:sha1:b47eb4a2b302f33adaed2a27d2b3bfc74fe35ac5</id>
<content type='text'>
The eviction code is the gnarly underbelly of memory management, and is
clearer if kept separated from the normal domain management in GEM.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
</entry>
<entry>
<title>drm/i915: Move ringbuffer-related code to intel_ringbuffer.c.</title>
<updated>2010-05-26T19:36:00Z</updated>
<author>
<name>Eric Anholt</name>
</author>
<published>2010-05-21T20:26:39Z</published>
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<id>urn:sha1:62fdfeaf8b1f487060b6e160e7b5cd90287607c9</id>
<content type='text'>
This is preparation for supporting multiple ringbuffers on Ironlake.
The non-copy-and-paste changes are:
- de-staticing functions
- I915_GEM_GPU_DOMAINS moving to i915_drv.h to be used by both files.
- i915_gem_add_request had only half its implementation
  copy-and-pasted out of the middle of it.
</content>
</entry>
<entry>
<title>drm/i915: Fix out of tree builds</title>
<updated>2010-05-10T20:38:32Z</updated>
<author>
<name>Peter Clifton</name>
</author>
<published>2010-05-03T12:24:41Z</published>
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<id>urn:sha1:a7c542782e92f9487c62a571565637be3d6b0ffd</id>
<content type='text'>
Fixes up include paths for i915_trace.h by setting additional CFLAGS
for i915_trace_points.c to include the $src directory. The required
TRACE_INCLUDE_PATH is then "."

Signed-off-by: Peter Clifton &lt;pcjc2@cam.ac.uk&gt;
Signed-off-by: Eric Anholt &lt;eric@anholt.net&gt;
</content>
</entry>
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