<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/gpu/drm/amd/display/dmub, branch linux-6.4.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.4.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.4.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2023-08-03T08:25:46Z</updated>
<entry>
<title>drm/amd/display: Add FAMS validation before trying to use it</title>
<updated>2023-08-03T08:25:46Z</updated>
<author>
<name>Rodrigo Siqueira</name>
</author>
<published>2023-03-24T20:29:52Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=74f46ce3474762ab30cfc03fe411a15355099d05'/>
<id>urn:sha1:74f46ce3474762ab30cfc03fe411a15355099d05</id>
<content type='text'>
[ Upstream commit e3416e872f84086667df21daf166506fab97358d ]

To ensure that FAMS can be used, DC must check if there is VRR support.
This commit adds the required configuration to ensure FAMS can be executed in the target system.

Reviewed-by: Alvin Lee &lt;Alvin.Lee2@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Stable-dep-of: 2a9482e55968 ("drm/amd/display: Prevent vtotal from being set to 0")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Set minimum requirement for using PSR-SU on Phoenix</title>
<updated>2023-08-03T08:25:45Z</updated>
<author>
<name>Mario Limonciello</name>
</author>
<published>2023-06-23T15:05:21Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=adff2d7cc515ec9b73a711b51c76f8bd5c548ced'/>
<id>urn:sha1:adff2d7cc515ec9b73a711b51c76f8bd5c548ced</id>
<content type='text'>
[ Upstream commit cd2e31a9ab93d13c412a36c6e26811e0f830985b ]

The same parade TCON issue can potentially happen on Phoenix, and the same
PSR resilience changes have been ported into the DMUB firmware.

Don't allow running PSR-SU unless on the newer firmware.

Cc: stable@vger.kernel.org
Cc: Sean Wang &lt;sean.ns.wang@amd.com&gt;
Cc: Marc Rossi &lt;Marc.Rossi@amd.com&gt;
Cc: Hamza Mahfooz &lt;Hamza.Mahfooz@amd.com&gt;
Cc: Tsung-hua (Ryan) Lin &lt;Tsung-hua.Lin@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Reviewed-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Set minimum requirement for using PSR-SU on Rembrandt</title>
<updated>2023-08-03T08:25:45Z</updated>
<author>
<name>Mario Limonciello</name>
</author>
<published>2023-06-23T15:05:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f73fac742bb1ce97e9135f9729eb7bcc20293d81'/>
<id>urn:sha1:f73fac742bb1ce97e9135f9729eb7bcc20293d81</id>
<content type='text'>
[ Upstream commit c35b6ea8f2ecfa9d775530b70d4e727869099a9c ]

A number of parade TCONs are causing system hangs when utilized with
older DMUB firmware and PSR-SU. Some changes have been introduced into
DMUB firmware to add resilience against these failures.

Don't allow running PSR-SU unless on the newer firmware.

Cc: stable@vger.kernel.org
Cc: Sean Wang &lt;sean.ns.wang@amd.com&gt;
Cc: Marc Rossi &lt;Marc.Rossi@amd.com&gt;
Cc: Hamza Mahfooz &lt;Hamza.Mahfooz@amd.com&gt;
Cc: Tsung-hua (Ryan) Lin &lt;Tsung-hua.Lin@amd.com&gt;
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2443
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Reviewed-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Stable-dep-of: cd2e31a9ab93 ("drm/amd/display: Set minimum requirement for using PSR-SU on Phoenix")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Update correct DCN314 register header</title>
<updated>2023-08-03T08:25:45Z</updated>
<author>
<name>Cruise Hung</name>
</author>
<published>2023-05-12T15:33:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=452bbeb39ea506f33ab550bda7ecd262db36f707'/>
<id>urn:sha1:452bbeb39ea506f33ab550bda7ecd262db36f707</id>
<content type='text'>
[ Upstream commit 268182606f26434c5d3ebd0e86efcb0418dec487 ]

[Why]
The register header for DCN314 is not correct.

[How]
Update correct DCN314 register header.

Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Cruise Hung &lt;cruise.hung@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Stable-dep-of: cd2e31a9ab93 ("drm/amd/display: Set minimum requirement for using PSR-SU on Phoenix")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Correct `DMUB_FW_VERSION` macro</title>
<updated>2023-07-23T11:54:04Z</updated>
<author>
<name>Mario Limonciello</name>
</author>
<published>2023-06-23T15:05:19Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7c535cf9f62fcd987be8c00f3b43a06efc0f0c3f'/>
<id>urn:sha1:7c535cf9f62fcd987be8c00f3b43a06efc0f0c3f</id>
<content type='text'>
commit 274d205cb59f43815542e04b42a9e6d0b9b95eff upstream.

The `DMUB_FW_VERSION` macro has a mistake in that the revision field
is off by one byte. The last byte is typically used for other purposes
and not a revision.

Cc: stable@vger.kernel.org
Cc: Sean Wang &lt;sean.ns.wang@amd.com&gt;
Cc: Marc Rossi &lt;Marc.Rossi@amd.com&gt;
Cc: Hamza Mahfooz &lt;Hamza.Mahfooz@amd.com&gt;
Cc: Tsung-hua (Ryan) Lin &lt;Tsung-hua.Lin@amd.com&gt;
Reviewed-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Do not clear GPINT register when releasing DMUB from reset</title>
<updated>2023-04-27T02:40:59Z</updated>
<author>
<name>Aurabindo Pillai</name>
</author>
<published>2023-04-06T19:48:48Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=99d92eaca5d915763b240aae24669f5bf3227ecf'/>
<id>urn:sha1:99d92eaca5d915763b240aae24669f5bf3227ecf</id>
<content type='text'>
[Why &amp; How]
There's no need to clear GPINT register for DMUB
when releasing it from reset. Fix that.

Fixes: ac2e555e0a7f ("drm/amd/display: Add DMCUB source files and changes for DCN32/321")
Reviewed-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Reset OUTBOX0 r/w pointer on DMUB reset</title>
<updated>2023-04-27T02:38:28Z</updated>
<author>
<name>Cruise Hung</name>
</author>
<published>2022-05-13T01:16:42Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=425afa0ac99a05b39e6cd00704fa0e3e925cee2b'/>
<id>urn:sha1:425afa0ac99a05b39e6cd00704fa0e3e925cee2b</id>
<content type='text'>
[Why &amp; How]
We missed resetting OUTBOX0 mailbox r/w pointer on DMUB reset.
Fix it.

Fixes: 6ecf9773a503 ("drm/amd/display: Fix DMUB outbox trace in S4 (#4465)")
Signed-off-by: Cruise Hung &lt;Cruise.Hung@amd.com&gt;
Acked-by: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: [FW Promotion] Release 0.0.161.0</title>
<updated>2023-04-11T22:03:43Z</updated>
<author>
<name>Anthony Koo</name>
</author>
<published>2023-03-25T13:55:13Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=9dce8c2a5f1bf5a304aae39342816f099247d7da'/>
<id>urn:sha1:9dce8c2a5f1bf5a304aae39342816f099247d7da</id>
<content type='text'>
 - Add command to idle opt.
 - Rename d3 entry event and add idle trigger param on
   notify event.
 - Add bit to fw boot status to notify status when hardware
   is powered up.

Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: [FW Promotion] Release 0.0.160.0</title>
<updated>2023-03-31T15:18:54Z</updated>
<author>
<name>Anthony Koo</name>
</author>
<published>2023-03-18T15:17:16Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d3981ee76dda3370d2f51ac0c528dd4dfb45cb97'/>
<id>urn:sha1:d3981ee76dda3370d2f51ac0c528dd4dfb45cb97</id>
<content type='text'>
- New parameter to define extra vblank stretch required when
 doing FPO + Vactive
- Pass in pipe index for FPO

Reviewed-by: Alvin Lee &lt;Alvin.Lee2@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add CRC and DMUB test support</title>
<updated>2023-03-22T04:59:52Z</updated>
<author>
<name>Charlene Liu</name>
</author>
<published>2023-03-09T20:03:50Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a36f72547e0eb623912957aeb68465e3c9f7effe'/>
<id>urn:sha1:a36f72547e0eb623912957aeb68465e3c9f7effe</id>
<content type='text'>
[Why &amp; How]
- Add CRC for test support
- Add params to allow control into to DMUB.

Reviewed-by: Chris Park &lt;Chris.Park@amd.com&gt;
Acked-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Signed-off-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
