<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/gpu/drm/amd/display/dc, branch linux-6.7.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.7.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.7.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2024-04-03T13:11:53Z</updated>
<entry>
<title>drm/amd/display: set odm_combine_policy based on context in dcn32 resource</title>
<updated>2024-04-03T13:11:53Z</updated>
<author>
<name>Wenjing Liu</name>
</author>
<published>2024-01-18T23:12:15Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=554e3c1ecd434c4044a34e38a7e9a2a0e9c0b115'/>
<id>urn:sha1:554e3c1ecd434c4044a34e38a7e9a2a0e9c0b115</id>
<content type='text'>
[ Upstream commit 0a5fd7811a17af708cefdaab93af86838353002d ]

[why]
When populating dml pipes, odm combine policy should be assigned based
on the pipe topology of the context passed in. DML pipes could be
repopulated multiple times during single validate bandwidth attempt. We
need to make sure that whenever we repopulate the dml pipes it is always
aligned with the updated context. There is a case where DML pipes get
repopulated during FPO optimization after ODM combine policy is changed.
Since in the current code we reinitlaize ODM combine policy, even though
the current context has ODM combine enabled, we overwrite it despite the
pipes are already split. This causes DML to think that MPC combine is
used so we mistakenly enable MPC combine because we apply pipe split
with ODM combine policy reset. This issue doesn't impact non windowed
MPO with ODM case because the legacy policy has restricted use cases. We
don't encounter the case where both ODM and FPO optimizations are
enabled together. So we decide to leave it as is because it is about to
be replaced anyway.

Cc: stable@vger.kernel.org # 6.6+
Reviewed-by: Chaitanya Dhere &lt;chaitanya.dhere@amd.com&gt;
Reviewed-by: Alvin Lee &lt;alvin.lee2@amd.com&gt;
Acked-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix bounds check for dcn35 DcfClocks</title>
<updated>2024-04-03T13:11:52Z</updated>
<author>
<name>Roman Li</name>
</author>
<published>2024-03-13T22:35:13Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c373f233dab44a13752daec13788e2ad3bf86410'/>
<id>urn:sha1:c373f233dab44a13752daec13788e2ad3bf86410</id>
<content type='text'>
commit 2f10d4a51bbcd938f1f02f16c304ad1d54717b96 upstream.

[Why]
NumFclkLevelsEnabled is used for DcfClocks bounds check
instead of designated NumDcfClkLevelsEnabled.
That can cause array index out-of-bounds access.

[How]
Use designated variable for dcn35 DcfClocks bounds check.

Fixes: a8edc9cc0b14 ("drm/amd/display: Fix array-index-out-of-bounds in dcn35_clkmgr")
Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Sun peng Li &lt;sunpeng.li@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Roman Li &lt;roman.li@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Set DCN351 BB and IP the same as DCN35</title>
<updated>2024-04-03T13:11:51Z</updated>
<author>
<name>Xi Liu</name>
</author>
<published>2024-02-27T18:39:00Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e8b9ff711f3bd6872c1c1c36c6812ded4810f9b7'/>
<id>urn:sha1:e8b9ff711f3bd6872c1c1c36c6812ded4810f9b7</id>
<content type='text'>
commit 0ccc2b30f4feadc0b1a282dbcc06e396382e5d74 upstream.

[WHY &amp; HOW]
DCN351 and DCN35 should use the same bounding box and IP settings.

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Jun Lei &lt;jun.lei@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Xi Liu &lt;xi.liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Remove MPC rate control logic from DCN30 and above</title>
<updated>2024-04-03T13:11:51Z</updated>
<author>
<name>George Shen</name>
</author>
<published>2024-02-17T00:37:03Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=cfe87ee1d67da1253499ec6766b9e0062ce9423f'/>
<id>urn:sha1:cfe87ee1d67da1253499ec6766b9e0062ce9423f</id>
<content type='text'>
commit edfa93d87fc46913868481fe8ed3fb62c891ffb5 upstream.

[Why]
MPC flow rate control is not needed for DCN30 and above. Current logic
that uses it can result in underflow for certain edge cases (such as
DSC N422 + ODM combine + 422 left edge pixel).

[How]
Remove MPC flow rate control logic and programming for DCN30 and above.

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: George Shen &lt;george.shen@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Prevent crash when disable stream</title>
<updated>2024-04-03T13:11:46Z</updated>
<author>
<name>Chris Park</name>
</author>
<published>2024-03-05T22:41:15Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=59772327d439874095516673b4b30c48bd83ca38'/>
<id>urn:sha1:59772327d439874095516673b4b30c48bd83ca38</id>
<content type='text'>
commit 72d72e8fddbcd6c98e1b02d32cf6f2b04e10bd1c upstream.

[Why]
Disabling stream encoder invokes a function that no longer exists.

[How]
Check if the function declaration is NULL in disable stream encoder.

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Acked-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Signed-off-by: Chris Park &lt;chris.park@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix noise issue on HDMI AV mute</title>
<updated>2024-04-03T13:11:32Z</updated>
<author>
<name>Leo Ma</name>
</author>
<published>2023-07-28T12:35:07Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=267253898a7b45f497e8c4cda9ce47a40b774474'/>
<id>urn:sha1:267253898a7b45f497e8c4cda9ce47a40b774474</id>
<content type='text'>
[ Upstream commit 69e3be6893a7e668660b05a966bead82bbddb01d ]

[Why]
When mode switching is triggered there is momentary noise visible on
some HDMI TV or displays.

[How]
Wait for 2 frames to make sure we have enough time to send out AV mute
and sink receives a full frame.

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Acked-by: Wayne Lin &lt;wayne.lin@amd.com&gt;
Signed-off-by: Leo Ma &lt;hanghong.ma@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix idle check for shared firmware state</title>
<updated>2024-04-03T13:11:32Z</updated>
<author>
<name>Nicholas Kazlauskas</name>
</author>
<published>2024-02-21T17:27:31Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3c274e849feca66989b274935cb8a375f763d891'/>
<id>urn:sha1:3c274e849feca66989b274935cb8a375f763d891</id>
<content type='text'>
[ Upstream commit 3d066f9547dd58329b526db44f42c487a7974703 ]

[WHY]
We still had an instance of get_idle_state checking the PMFW scratch
register instead of the actual idle allow signal.

[HOW]
Replace it with the SW state check for whether we had allowed idle
through notify_idle.

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Duncan Ma &lt;duncan.ma@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Update odm when ODM combine is changed on an otg master pipe with no plane</title>
<updated>2024-04-03T13:11:32Z</updated>
<author>
<name>Wenjing Liu</name>
</author>
<published>2024-02-21T21:55:04Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e0123486e288e5ec811b416f0844809e6a8f168d'/>
<id>urn:sha1:e0123486e288e5ec811b416f0844809e6a8f168d</id>
<content type='text'>
[ Upstream commit 86e9523fb0efce27095d3086473c739cce720d01 ]

[WHY]
When committing an update with ODM combine change when the plane is
removing or already removed, we fail to detect odm change in pipe
update flags. This has caused mismatch between new dc state and the
actual hardware state, because we missed odm programming.

[HOW]
- Detect odm change even for otg master pipe without a plane.
- Update odm config before calling program pipes for pipe with planes.

The commit also updates blank pattern programming when odm is changed
without plane. This is because number of OPP is changed when ODM
combine is changed. Blank pattern is per OPP so we will need to
reprogram OPP based on the new pipe topology.

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Dillon Varone &lt;dillon.varone@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Init DPPCLK from SMU on dcn32</title>
<updated>2024-04-03T13:11:32Z</updated>
<author>
<name>Dillon Varone</name>
</author>
<published>2024-02-21T18:21:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=270e06593442c8c0b50bf55b011c701276510088'/>
<id>urn:sha1:270e06593442c8c0b50bf55b011c701276510088</id>
<content type='text'>
[ Upstream commit 4f5b8d78ca43fcc695ba16c83ebfabbfe09506d6 ]

[WHY &amp; HOW]
DPPCLK ranges should be obtained from the SMU when available.

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Chaitanya Dhere &lt;chaitanya.dhere@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Dillon Varone &lt;dillon.varone@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add dml2 copy functions</title>
<updated>2024-04-03T13:11:32Z</updated>
<author>
<name>Dillon Varone</name>
</author>
<published>2023-12-01T13:25:18Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2064f7529dfe0305d6fafda77fdf66701d428db5'/>
<id>urn:sha1:2064f7529dfe0305d6fafda77fdf66701d428db5</id>
<content type='text'>
[ Upstream commit abd26a3252cbd1a3ae4e46d37596d176fe50b41a ]

Add function to handle deep copying dml2 context.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Chaitanya Dhere &lt;chaitanya.dhere@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;rodrigo.siqueira@amd.com&gt;
Signed-off-by: Dillon Varone &lt;dillon.varone@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Stable-dep-of: 4f5b8d78ca43 ("drm/amd/display: Init DPPCLK from SMU on dcn32")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
</feed>
