kernel.git/drivers/gpu/drm/amd/display/dc/resource, branch linux-6.14.y

drm/amd/display: calculate the remain segments for all pipes

2025-05-29T09:12:49Z

[ Upstream commit d3069feecdb5542604d29b59acfd1fd213bad95b ] [WHY] In some cases the remain de-tile buffer segments will be greater than zero if we don't add the non-top pipe to calculate, at this time the override de-tile buffer size will be valid and used. But it makes the de-tile buffer segments used finally for all of pipes exceed the maximum. [HOW] Add the non-top pipe to calculate the remain de-tile buffer segments. Don't set override size to use the average according to pipe count if the value exceed the maximum. Reviewed-by: Charlene Liu Signed-off-by: Zhikai Zhai Signed-off-by: Tom Chung Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin

drm/amd/display: Temporarily disable hostvm on DCN31

2025-04-25T08:51:20Z

commit ba93dddfc92084a1e28ea447ec4f8315f3d8d3fd upstream. With HostVM enabled, DCN31 fails to pass validation for 3x4k60. Some Linux userspace does not downgrade one of the monitors to 4k30, and the result is that the monitor does not light up. Disable it until the bandwidth calculation failure is resolved. Reviewed-by: Sun peng Li Signed-off-by: Aurabindo Pillai Signed-off-by: Zaeem Mohamed Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Greg Kroah-Hartman

drm/amd/display: Add SMU interface to get UMC count for dcn401

2025-01-10T17:04:43Z

[WHY&HOW] BIOS table will not always contain accurate UMC channel info when harvesting is enabled, so get the correct info from SMU. Reviewed-by: Alvin Lee Signed-off-by: Dillon Varone Signed-off-by: Tom Chung Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: DML2.1 Post-Si Cleanup

2025-01-10T17:00:34Z

[Why] There are a few cleanup and refactoring tasks that need to be done with the DML2.1 wrapper and DC interface to remove dependencies on legacy structures and N-1 prototypes. [How] Implemented pipe_ctx->global_sync. Implemented new functions to use pipe_ctx->hubp_regs and pipe_ctx->global_sync: - hubp_setup2 - hubp_setup_interdependent2 - Several other new functions for DCN 4.01 to support newer structures Removed dml21_update_pipe_ctx_dchub_regs Removed dml21_extract_legacy_watermark_set Removed dml21_populate_pipe_ctx_dlg_param Removed outdated dcn references in DML2.1 wrapper. Reviewed-by: Austin Zheng Reviewed-by: Dillon Varone Signed-off-by: Rafal Ostrowski Signed-off-by: Tom Chung Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Limit Scaling Ratio on DCN3.01

2025-01-10T16:59:18Z

[why] Underflow and flickering was occuring due to high scaling ratios when resizing videos. [how] Limit the scaling ratios by increasing the max scaling factor Reviewed-by: Nicholas Kazlauskas Signed-off-by: Gabe Teeger Signed-off-by: Tom Chung Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: fix init_adj offset for cositing in SPL

2025-01-06T19:44:27Z

[Why & How] init_adj offset is applied when cosited not interstitial Adjust cositing offset in SPL Reviewed-by: Jun Lei Signed-off-by: Samson Tam Signed-off-by: Roman Li Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Ensure correct GFX tiling info passed to DML

2025-01-06T19:44:27Z

[Why] To ensure DML validation receives the correct tiling information, such as swizzle mode or array mode, based on the active GFX format [How] - For new GFX format passed swizzle_mode to DML. - For legacy GFX format passed array_mode to DML. - Dynamically determined the appropriate tiling info based on the active GFX format. [Description] This commit ensures that the correct GFX tiling information is passed to DML. Depending on the active GFX format, the appropriate tiling info is passed to DML. This change accommodates the different GFX formats supported by latest platforms, ensuring compatibility and proper DML validation. Reviewed-by: Alvin Lee Signed-off-by: Karthi Kandasamy Signed-off-by: Roman Li Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Add support for FAMS2+ interface versions

2024-12-18T17:18:33Z

Current driver interface does not allow for flexibility in coexistence of multiple interface versions, so add support for checking minor interface revisions and providing appropriate programming. Tested-by: Daniel Wheeler Reviewed-by: Alvin Lee Signed-off-by: Dillon Varone Signed-off-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amdgpu: rename register headers to dcn_2_0_1

2024-12-10T15:37:34Z

They were named with the incorrect dcn version. Signed-off-by: Aurabindo Pillai Signed-off-by: Sun peng Li Acked-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amd/display: Use resource_build_scaling_params for dcn20

2024-12-10T15:32:21Z

[WHY] When using upscaling on certain gpus, some incorrect scaling calculations would be made causing hangs. [HOW] This was fixed by using the resource_build_scaling_params function on these gpus. Reviewed-by: Dillon Varone Reviewed-by: Alvin Lee Signed-off-by: Peterson Guo Signed-off-by: Aurabindo Pillai Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher