<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/gpu/drm/amd/display/dc/link, branch linux-6.5.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.5.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.5.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2023-10-06T11:16:00Z</updated>
<entry>
<title>drm/amd/display: fix a regression in blank pixel data caused by coding mistake</title>
<updated>2023-10-06T11:16:00Z</updated>
<author>
<name>Wenjing Liu</name>
</author>
<published>2023-07-24T17:12:58Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2b4c845a613b777c8ed28296301c8cb5a8af127b'/>
<id>urn:sha1:2b4c845a613b777c8ed28296301c8cb5a8af127b</id>
<content type='text'>
[ Upstream commit f77d1a49902bc70625e3d101a16d8a687f7e97db ]

[why]
There was unfortunately a coding mistake. It gets caught with an ultrawide monitor
that requires ODM 4:1 combine. We are blanking or unblanking pixel data we
are supposed to enumerate through all ODM pipes and program DPG for each
of those pipes. However the coding mistake causes us to program only the
first and last ODM pipes.

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Martin Leung &lt;martin.leung@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Update DPG test pattern programming</title>
<updated>2023-10-06T11:16:00Z</updated>
<author>
<name>Wenjing Liu</name>
</author>
<published>2023-07-13T22:40:51Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5934e2ab73f5765cab2b5850a5a84da04ed69fb2'/>
<id>urn:sha1:5934e2ab73f5765cab2b5850a5a84da04ed69fb2</id>
<content type='text'>
[ Upstream commit ad4455c614b27e6b24a4e6bd70114545c1660ff9 ]

[Why]
Last ODM slice could be slightly larger than other slice because it can be
including the residual.

[How]
Update DPG pattern programming sequence to use a different width for
last odm slice.

Reviewed-by: Chris Park &lt;chris.park@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Stable-dep-of: f77d1a49902b ("drm/amd/display: fix a regression in blank pixel data caused by coding mistake")
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add DPIA Link Encoder Assignment Fix</title>
<updated>2023-09-23T09:14:38Z</updated>
<author>
<name>Mustapha Ghaddar</name>
</author>
<published>2023-08-10T20:20:23Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3e208888eb142d5a8dd8dab358889d389d8c3d84'/>
<id>urn:sha1:3e208888eb142d5a8dd8dab358889d389d8c3d84</id>
<content type='text'>
commit 64be47ba286117ee4e3dd9d064c88ea2913e3269 upstream.

For DPIA we should have preferred DIG assignment based on DPIA selected
as per the ASIC design.

Reviewed-by: George Shen &lt;george.shen@amd.com&gt;
Acked-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Mustapha Ghaddar &lt;mghaddar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Work around bad DPCD state on link loss</title>
<updated>2023-06-30T17:11:35Z</updated>
<author>
<name>Ilya Bakoulin</name>
</author>
<published>2023-06-02T21:01:23Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2faa3653d6657aedf357ca74c4e58c5768899269'/>
<id>urn:sha1:2faa3653d6657aedf357ca74c4e58c5768899269</id>
<content type='text'>
[Why]
This display doesn't properly indicate link loss through DPCD bits such
as CR_DONE / CHANNEL_EQ_DONE / SYMBOL_LOCKED / INTERLANE_ALIGN_DONE,
which all remain set.

In addition, DPCD200Eh doesn't match the value of DPCD204h in all cases.

For these reasons, we can miss re-training the link, since we don't
properly detect link loss with this display.

[Why]
Add display-specific workaround to read DPCD204h, so that we can detect
link loss based on 128b132b-specific status bits in this register.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;rodrigo.siqueira@amd.com&gt;
Signed-off-by: Ilya Bakoulin &lt;ilya.bakoulin@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix 128b132b link loss handling</title>
<updated>2023-06-23T19:45:48Z</updated>
<author>
<name>Ilya Bakoulin</name>
</author>
<published>2023-06-07T20:49:45Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ed83fe2abcace898fdec5c2ba0455703178ac9a3'/>
<id>urn:sha1:ed83fe2abcace898fdec5c2ba0455703178ac9a3</id>
<content type='text'>
[Why]
We don't check 128b132b-specific bits in LANE_ALIGN_STATUS_UPDATED DPCD
registers when parsing link loss status, which can cause us to miss a
link loss notification from some sinks.

[How]
Add a 128b132b-specific status bit check.

Cc: stable@vger.kernel.org # 6.3+
Reviewed-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Acked-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Ilya Bakoulin &lt;ilya.bakoulin@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: limit DPIA link rate to HBR3</title>
<updated>2023-06-15T14:44:57Z</updated>
<author>
<name>Peichen Huang</name>
</author>
<published>2023-05-31T05:36:14Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0e69ef6ea82e8eece7d2b2b45a0da9670eaaefff'/>
<id>urn:sha1:0e69ef6ea82e8eece7d2b2b45a0da9670eaaefff</id>
<content type='text'>
[Why]
DPIA doesn't support UHBR, driver should not enable UHBR
for dp tunneling

[How]
limit DPIA link rate to HBR3

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Acked-by: Stylon Wang &lt;stylon.wang@amd.com&gt;
Signed-off-by: Peichen Huang &lt;peichen.huang@amd.com&gt;
Reviewed-by: Mustapha Ghaddar &lt;Mustapha.Ghaddar@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add control flag to dc_stream_state to skip eDP BL off/link off</title>
<updated>2023-06-09T16:41:29Z</updated>
<author>
<name>Max Tseng</name>
</author>
<published>2023-04-25T07:05:17Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8e7b3f5435b3c0751515c973972ebb11e0fc0fb5'/>
<id>urn:sha1:8e7b3f5435b3c0751515c973972ebb11e0fc0fb5</id>
<content type='text'>
Add control flag to dc_stream_state to skip eDP BL off/link off.

Acked-by: Stylon Wang &lt;stylon.wang@amd.com&gt;
Signed-off-by: Max Tseng &lt;max.tseng@amd.com&gt;
Reviewed-by: Anthony Koo &lt;Anthony.Koo@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: clean up some inconsistent indenting</title>
<updated>2023-06-09T16:37:24Z</updated>
<author>
<name>Jiapeng Chong</name>
</author>
<published>2023-06-02T06:17:53Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2b607025797543433e7733c276ec34381edffd71'/>
<id>urn:sha1:2b607025797543433e7733c276ec34381edffd71</id>
<content type='text'>
No functional modification involved.

drivers/gpu/drm/amd/amdgpu/../display/dc/link/link_dpms.c:2377 link_set_dpms_on() warn: inconsistent indenting.

Reported-by: Abaci Robot &lt;abaci@linux.alibaba.com&gt;
Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=5376
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Jiapeng Chong &lt;jiapeng.chong@linux.alibaba.com&gt;
Signed-off-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Clean FPGA code in dc</title>
<updated>2023-06-09T14:44:11Z</updated>
<author>
<name>Qingqing Zhuo</name>
</author>
<published>2023-03-16T13:05:58Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=25879d7b4986beba3f0d84762fe40d09fdc8b219'/>
<id>urn:sha1:25879d7b4986beba3f0d84762fe40d09fdc8b219</id>
<content type='text'>
[Why]
Drop dead code for Linux.

[How]
Remove all IS_FPGA_MAXIMUS_DC and IS_DIAG_DC

Reviewed-by: Ariel Bernstein &lt;eric.bernstein@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Qingqing Zhuo &lt;qingqing.zhuo@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: lower dp link training message level</title>
<updated>2023-06-09T14:42:39Z</updated>
<author>
<name>Hersen Wu</name>
</author>
<published>2023-04-24T15:39:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=38ff516bb00cd8e974c8b5e70ab6e1b354b8f424'/>
<id>urn:sha1:38ff516bb00cd8e974c8b5e70ab6e1b354b8f424</id>
<content type='text'>
[Why] some test apps report dp link training waring even dp
training pass. there are 4 tries of lt within
perform_link_training_with_retries. if lt pass within 4 tries,
it will NOT be reated as lt failure. for each try of lt, if lt
fails, current driver implementation prints message at warning
level. this let people think dp lt does not work properly.

[How] for 1st, 2nd and 3rd try of lt, print message at debug
level. for the 4th try of lt, print message at warning level.

Reviewed-by: Jerry Zuo &lt;jerry.zuo@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Hersen Wu &lt;hersenxs.wu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
