kernel.git/drivers/gpu/drm/amd/display/dc/inc, branch linux-5.6.y

drm/amd/display: Defer cursor lock until after VUPDATE

2020-06-03T06:23:23Z

[ Upstream commit 31ecebee9c36d5e5e113a357a655d993fa916174 ] [Why] We dropped the delay after changed the cursor functions locking the entire pipe to locking just the CURSOR registers to fix page flip stuttering - this introduced cursor stuttering instead, and an underflow issue. The cursor update can be delayed indefinitely if the cursor update repeatedly happens right around VUPDATE. The underflow issue can happen if we do a viewport update on a pipe on the same frame where a cursor update happens around VUPDATE - the old cursor registers are retained which can be in an invalid position. This can cause a pipe hang and indefinite underflow. [How] The complex, ideal solution to the problem would be a software triple buffering mechanism from the DM layer to program only one cursor update per frame just before VUPDATE. The simple workaround until we have that infrastructure in place is this change - bring back the delay until VUPDATE before locking, but with some corrections to the calculations. This didn't work for all timings before because the calculation for VUPDATE was wrong - it was using the offset from VSTARTUP instead and didn't correctly handle the case where VUPDATE could be in the back porch. Add a new hardware sequencer function to use the existing helper to calculate the real VUPDATE start and VUPDATE end - VUPDATE can last multiple lines after all. Change the udelay to incorporate the width of VUPDATE as well. Signed-off-by: Nicholas Kazlauskas Reviewed-by: Aric Cyr Acked-by: Rodrigo Siqueira Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin

drm/amd/display: Use cursor locking to prevent flip delays

2020-06-03T06:23:23Z

[ Upstream commit b2a7b0ce0773bfa4406bc0a78e41979532a1edd7 ] [Why] Current locking scheme for cursor can result in a flip missing its vsync, deferring it for one or more vsyncs. Result is a potential for stuttering when cursor is moved. [How] Use cursor update lock so that flips are not blocked while cursor is being programmed. Signed-off-by: Aric Cyr Reviewed-by: Nicholas Kazlauskas Acked-by: Aurabindo Pillai Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin

drm/amd/display: Added locking for atomic update stream and update planes

2020-06-03T06:23:23Z

[ Upstream commit 009114f6df84150a567b05537aa29b9d660e419b ] [Why] Screen flickering when HDR switches between FP16 and ARGB2101010 [How] Moved pipe_control_lock so stream update and plane update occur atomically Signed-off-by: Anthony Koo Signed-off-by: Lucy Li Reviewed-by: Aric Cyr Acked-by: Bhawanpreet Lakha Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin

drm/amd/display: Split program front end part that occur outside lock

2020-06-03T06:23:22Z

[ Upstream commit bbf5f6c3f83bedd71006473849138a446ad4d9a3 ] [Why] Eventually want to lock at a higher level in stack. To do this, we need to be able to isolate the parts that need to be done after pipe unlock. [How] Split out programming that is done post unlock. Signed-off-by: Anthony Koo Reviewed-by: Aric Cyr Acked-by: Bhawanpreet Lakha Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin

drm/amd/display: fixup DML dependencies

2020-01-16T19:16:48Z

[why] Need to fix DML portability issues to enable SW unit testing around DML [how] Move calcs into dc include folder since multiple components reference it Remove relative paths to external dependencies Signed-off-by: Jun Lei Reviewed-by: Anthony Koo Acked-by: Harry Wentland Acked-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amd/display: Only program surface flip for video plane via dmcub

2020-01-16T19:16:33Z

Only need to do surface flip for video plane via dmcub. Signed-off-by: Yongqiang Sun Reviewed-by: Tony Cheng Acked-by: Harry Wentland Acked-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amd/display: Add monitor patch for AUO dpcd issue

2020-01-16T19:16:21Z

[Why] dpcd cap mismatch in 2200 vs base [How] Add monitor patch which using based caps to overwrite 2200 Signed-off-by: Lewis Huang Reviewed-by: Tony Cheng Acked-by: Harry Wentland Acked-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amd/display: make PSR static screen entry within 30 ms

2020-01-16T19:16:08Z

[Why] With different refresh rate panels, the PSR entry/exit time is different since it is dependent on 2 frame entry time today [How] Make static screen num frame entry time to be calculated such that entry time is within 30 ms instead of fixed num frames. Signed-off-by: Anthony Koo Reviewed-by: Tony Cheng Acked-by: Aric Cyr Acked-by: Harry Wentland Acked-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amd/display: Indirect reg read macro with shift and mask

2020-01-16T19:13:53Z

[Why] Recent double buffering changes for dcn2 use IX_REG_READ. However, this macro returns the full register value, with the need to manually shift and mask it to retrieve field data. [How] Create new IX_REG_GET macro that handles shift and mask. Use this for double buffering reads instead of IX_REG_READ. Signed-off-by: Noah Abradjian Reviewed-by: Tony Cheng Acked-by: Harry Wentland Acked-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amd/display: Driverside changes to support PSR in DMCUB

2020-01-16T19:13:23Z

[Why] Moving PSR from DMCU to DMCUB. [How] Add driverside PSR changes required to send inbox messages to fw. These changes are non-functional until the psr structure allocation is uncommented. Signed-off-by: Wyatt Wood Reviewed-by: Nicholas Kazlauskas Acked-by: Harry Wentland Acked-by: Rodrigo Siqueira Signed-off-by: Alex Deucher