<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/gpu/drm/amd/display/dc/inc, branch linux-5.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.17.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.17.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2022-04-20T07:36:05Z</updated>
<entry>
<title>drm/amd/display: Add pstate verification and recovery for DCN31</title>
<updated>2022-04-20T07:36:05Z</updated>
<author>
<name>Nicholas Kazlauskas</name>
</author>
<published>2021-12-17T14:55:54Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=9018c894e4c325063b114d755ddf82f47bf0afda'/>
<id>urn:sha1:9018c894e4c325063b114d755ddf82f47bf0afda</id>
<content type='text'>
commit e7031d8258f1b4d6d50e5e5b5d92ba16f66eb8b4 upstream.

[Why]
To debug when p-state is being blocked and avoid PMFW hangs when
it does occur.

[How]
Re-use the DCN10 hardware sequencer by adding a new interface for
verifying p-state high on the hubbub. The interface is mostly the
same as the DCN10 interface, but the bit definitions have changed for
the debug bus.

Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Reviewed-by: Eric Yang &lt;Eric.Yang2@amd.com&gt;
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix double free during GPU reset on DC streams</title>
<updated>2022-04-08T11:58:18Z</updated>
<author>
<name>Nicholas Kazlauskas</name>
</author>
<published>2022-02-28T15:48:56Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=bbfcdd6289ba6f00f0cd7d496946dce9f6c600ac'/>
<id>urn:sha1:bbfcdd6289ba6f00f0cd7d496946dce9f6c600ac</id>
<content type='text'>
[ Upstream commit 32685b32d825ca08c5dec826477332df886c4743 ]

[Why]
The issue only occurs during the GPU reset code path.

We first backup the current state prior to commiting 0 streams
internally from DM to DC. This state backup contains valid link
encoder assignments.

DC will clear the link encoder assignments as part of current state
(but not the backup, since it was a copied before the commit) and
free the extra stream reference it held.

DC requires that the link encoder assignments remain cleared/invalid
prior to commiting. Since the backup still has valid assignments we
call the interface post reset to clear them. This routine also
releases the extra reference that the link encoder interface held -
resulting in a double free (and eventually a NULL pointer dereference).

[How]
We'll have to do a full DC commit anyway after GPU reset because
the stream count previously went to 0.

We don't need to retain the assignment that we had backed up, so
just copy off of the now clean current state assignment after the
reset has occcurred with the new link_enc_cfg_copy() interface.

Fixes: 6d63fcc2a334 ("drm/amd/display: Reset link encoder assignments for GPU reset")

Reviewed-by: Jimmy Kizito &lt;Jimmy.Kizito@amd.com&gt;
Acked-by: Alan Liu &lt;HaoPing.Liu@amd.com&gt;
Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: revert "Reset fifo after enable otg"</title>
<updated>2022-02-02T23:35:00Z</updated>
<author>
<name>Zhan Liu</name>
</author>
<published>2022-01-28T14:03:59Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=49a6ebb95d04bdaa5d57313a380c44249cf02100'/>
<id>urn:sha1:49a6ebb95d04bdaa5d57313a380c44249cf02100</id>
<content type='text'>
[Why]
This change causes regression, that prevents some systems
from lighting up internal displays.

[How]
Revert this patch until a new solution is ready.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Acked-by: Stylon Wang &lt;stylon.wang@amd.com&gt;
Signed-off-by: Zhan Liu &lt;Zhan.Liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amd/display: Fix for otg synchronization logic</title>
<updated>2022-01-25T22:05:35Z</updated>
<author>
<name>Meenakshikumar Somasundaram</name>
</author>
<published>2021-11-15T06:51:37Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5f0c749158158f89eba7647bdc4e8096979de981'/>
<id>urn:sha1:5f0c749158158f89eba7647bdc4e8096979de981</id>
<content type='text'>
[Why]
During otg sync trigger, plane states are used to decide whether the otg
is already synchronized or not. There are scenarions when otgs are
disabled without plane state getting disabled and in such case the otg is
excluded from synchronization.

[How]
Introduced pipe_idx_syncd in pipe_ctx that tracks each otgs master pipe.
When a otg is disabled/enabled, pipe_idx_syncd is reset to itself.
On sync trigger, pipe_idx_syncd is checked to decide whether a otg is
already synchronized and the otg is further included or excluded from
synchronization.

v2:
  Don't drop is_blanked logic

Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Reviewed-by: Mustapha Ghaddar &lt;mustapha.ghaddar@amd.com&gt;
Acked-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: meenakshikumar somasundaram &lt;meenakshikumar.somasundaram@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Cc: torvalds@linux-foundation.org
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'drm-next-2022-01-14' of git://anongit.freedesktop.org/drm/drm</title>
<updated>2022-01-16T04:52:38Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2022-01-16T04:52:38Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=59d41458f143b7a20997b1e78b5c15d9d3e998c3'/>
<id>urn:sha1:59d41458f143b7a20997b1e78b5c15d9d3e998c3</id>
<content type='text'>
Pull drm fixes from Daniel Vetter:
"drivers fixes:

   - i915 fixes for ttm backend + one pm wakelock fix

   - amdgpu fixes, fairly big pile of small things all over. Note this
     doesn't yet containe the fixed version of the otg sync patch that
     blew up

   - small driver fixes: meson, sun4i, vga16fb probe fix

  drm core fixes:

   - cma-buf heap locking

   - ttm compilation

   - self refresh helper state check

   - wrong error message in atomic helpers

   - mipi-dbi buffer mapping"

* tag 'drm-next-2022-01-14' of git://anongit.freedesktop.org/drm/drm: (49 commits)
  drm/mipi-dbi: Fix source-buffer address in mipi_dbi_buf_copy
  drm: fix error found in some cases after the patch d1af5cd86997
  drm/ttm: fix compilation on ARCH=um
  dma-buf: cma_heap: Fix mutex locking section
  video: vga16fb: Only probe for EGA and VGA 16 color graphic cards
  drm/amdkfd: Fix ASIC name typos
  drm/amdkfd: Fix DQM asserts on Hawaii
  drm/amdgpu: Use correct VIEWPORT_DIMENSION for DCN2
  drm/amd/pm: only send GmiPwrDnControl msg on master die (v3)
  drm/amdgpu: use spin_lock_irqsave to avoid deadlock by local interrupt
  drm/amdgpu: not return error on the init_apu_flags
  drm/amdkfd: Use prange-&gt;update_list head for remove_list
  drm/amdkfd: Use prange-&gt;list head for insert_list
  drm/amdkfd: make SPDX License expression more sound
  drm/amdkfd: Check for null pointer after calling kmemdup
  drm/amd/display: invalid parameter check in dmub_hpd_callback
  Revert "drm/amdgpu: Don't inherit GEM object VMAs in child process"
  drm/amd/display: reset dcn31 SMU mailbox on failures
  drm/amdkfd: use default_groups in kobj_type
  drm/amdgpu: use default_groups in kobj_type
  ...
</content>
</entry>
<entry>
<title>Revert "drm/amd/display: Fix for otg synchronization logic"</title>
<updated>2022-01-11T02:50:10Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2022-01-11T02:50:10Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=75b950ef6166e4ef52e43e7ec80985c5705f7e81'/>
<id>urn:sha1:75b950ef6166e4ef52e43e7ec80985c5705f7e81</id>
<content type='text'>
This reverts commit a896f870f8a5f23ec961d16baffd3fda1f8be57c.

It causes odd flickering on my Radeon RX580 (PCI ID 1002:67df rev e7,
subsystem ID 1da2:e353).

Bisected right to this commit, and reverting it fixes things.

Link: https://lore.kernel.org/all/CAHk-=wg9hDde_L3bK9tAfdJ4N=TJJ+SjO3ZDONqH5=bVoy_Mzg@mail.gmail.com/
Cc: Alex Deucher &lt;alexdeucher@gmail.com&gt;
Cc: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Cc: Harry Wentland &lt;harry.wentland@amd.com&gt;
Cc: Dave Airlie &lt;airlied@gmail.com&gt;
Cc: Christian Koenig &lt;christian.koenig@amd.com&gt;
Cc: Jun Lei &lt;Jun.Lei@amd.com&gt;
Cc: Mustapha Ghaddar &lt;mustapha.ghaddar@amd.com&gt;
Cc: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Cc: meenakshikumar somasundaram &lt;meenakshikumar.somasundaram@amd.com&gt;
Cc: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: unhard code link to phy idx mapping in dc link and clean up</title>
<updated>2022-01-07T22:21:20Z</updated>
<author>
<name>Wenjing Liu</name>
</author>
<published>2021-12-13T23:29:27Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=580013b2cef8babc204b7b78ff093140e112b194'/>
<id>urn:sha1:580013b2cef8babc204b7b78ff093140e112b194</id>
<content type='text'>
[why]
1. Current code hard codes link to PHY mapping in dc link level per asic
per revision.
This is not scalable. In long term the mapping will be obatined from
DMUB and store in dc resource.

2. Depending on DCN revision and endpoint type, the definition of
dio_output_idx dio_output_type and phy_idx are not  consistent. We need
to unify the meaning of these hardware indices across different system
configuration.

[how]
1. Temporarly move the hardcoded mapping to dc_resource level, which
should have full awareness of asic specific configuration and add a TODO
comment to move the mapping to DMUB.

2. populate dio_output_idx/phy_idx for all configuration, define
usb4_enabled bit instead of dio_output_type as an external enum.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Eric Yang &lt;Eric.Yang2@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: get and restore link res map</title>
<updated>2021-12-30T13:54:45Z</updated>
<author>
<name>Wenjing Liu</name>
</author>
<published>2021-12-10T19:22:19Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=4c3adc0b846ba22a8a92764495950b7c2482153b'/>
<id>urn:sha1:4c3adc0b846ba22a8a92764495950b7c2482153b</id>
<content type='text'>
[why]
When reboot the link res map should be persisted.  So during boot up,
driver will look at the map to determine which link should take priority
to use certain link res.  This is to ensure that link res remains
unshuffled after a reboot.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: support dynamic HPO DP link encoder allocation</title>
<updated>2021-12-30T13:54:45Z</updated>
<author>
<name>Wenjing Liu</name>
</author>
<published>2021-11-29T19:43:02Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6dd8931b1ceebbb92e4e0a9d12a236d82a072ea4'/>
<id>urn:sha1:6dd8931b1ceebbb92e4e0a9d12a236d82a072ea4</id>
<content type='text'>
[why]
When there are more DP2.0 RXs connected than the number HPO DP link
encoders we have, we need to dynamically allocate HPO DP link encoder to
the port that needs it.

[how]
Only allocate HPO DP link encoder when it is needed.

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: populate link res in both detection and validation</title>
<updated>2021-12-30T13:54:44Z</updated>
<author>
<name>Wenjing Liu</name>
</author>
<published>2021-11-26T23:46:22Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f3fac9481bc7b9518df18f33b71a6109a245ccc6'/>
<id>urn:sha1:f3fac9481bc7b9518df18f33b71a6109a245ccc6</id>
<content type='text'>
[why]
This commit is to populate link res in preparation of the next commit.
The next commit will replace all existing code to use link res instead

Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Reviewed-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Wenjing Liu &lt;wenjing.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
