<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/gpu/drm/amd/display/dc/dml, branch linux-5.3.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.3.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.3.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2019-11-12T18:28:12Z</updated>
<entry>
<title>drm/amd/display: add 50us buffer as WA for pstate switch in active</title>
<updated>2019-11-12T18:28:12Z</updated>
<author>
<name>Jun Lei</name>
</author>
<published>2019-09-19T21:43:45Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3119fd1d045b7777e652b78d3ae96d01f1b4d9c2'/>
<id>urn:sha1:3119fd1d045b7777e652b78d3ae96d01f1b4d9c2</id>
<content type='text'>
[ Upstream commit 7c37d399c2b84d4b79de4d512a38373f1d71ab90 ]

Signed-off-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: readd -msse2 to prevent Clang from emitting libcalls to undefined SW FP routines</title>
<updated>2019-10-01T06:24:45Z</updated>
<author>
<name>Nick Desaulniers</name>
</author>
<published>2019-07-22T22:31:05Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a7e7ba5757ec4dc3cd85b2390a2719a03fc82fa8'/>
<id>urn:sha1:a7e7ba5757ec4dc3cd85b2390a2719a03fc82fa8</id>
<content type='text'>
commit 0f0727d971f6fdf8f1077180d495ddb9928f0c8b upstream.

arch/x86/Makefile disables SSE and SSE2 for the whole kernel.  The
AMDGPU drivers modified in this patch re-enable SSE but not SSE2.  Turn
on SSE2 to support emitting double precision floating point instructions
rather than calls to non-existent (usually available from gcc_s or
compiler_rt) floating point helper routines for Clang.

This was originally landed in:
commit 10117450735c ("drm/amd/display: add -msse2 to prevent Clang from emitting libcalls to undefined SW FP routines")
but reverted in:
commit 193392ed9f69 ("Revert "drm/amd/display: add -msse2 to prevent Clang from emitting libcalls to undefined SW FP routines"")
due to bugreports from GCC builds. Add guards to only do so for Clang.

Link: https://bugs.freedesktop.org/show_bug.cgi?id=109487
Link: https://github.com/ClangBuiltLinux/linux/issues/327

Suggested-by: Sedat Dilek &lt;sedat.dilek@gmail.com&gt;
Suggested-by: Sami Tolvanen &lt;samitolvanen@google.com&gt;
Signed-off-by: Nick Desaulniers &lt;ndesaulniers@google.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>drm/amd/display: add some parameters to validate bandwidth functions</title>
<updated>2019-06-22T14:34:13Z</updated>
<author>
<name>Charlene Liu</name>
</author>
<published>2019-06-03T14:53:44Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f82c916c41974c4e786c7311c34c33ca67373092'/>
<id>urn:sha1:f82c916c41974c4e786c7311c34c33ca67373092</id>
<content type='text'>
required for new checks.

Signed-off-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Reviewed-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Acked-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix incorrect vba type</title>
<updated>2019-06-22T14:34:13Z</updated>
<author>
<name>Ilya Bakoulin</name>
</author>
<published>2019-05-16T18:33:14Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=4f008d931b9f4d1cfeb88f04579786b3b2c3dcf2'/>
<id>urn:sha1:4f008d931b9f4d1cfeb88f04579786b3b2c3dcf2</id>
<content type='text'>
SwathWidthCThisState is expected to be an unsigned int array.

Signed-off-by: Ilya Bakoulin &lt;Ilya.Bakoulin@amd.com&gt;
Reviewed-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix incorrect DML output_bpp value</title>
<updated>2019-06-22T14:34:13Z</updated>
<author>
<name>Ilya Bakoulin</name>
</author>
<published>2019-05-03T21:22:32Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=03fd87db6d55b62a4771626a660a0df3d4a8546a'/>
<id>urn:sha1:03fd87db6d55b62a4771626a660a0df3d4a8546a</id>
<content type='text'>
[Why]
The output_bpp pipe parameter was assigned an incorrect value
(color depth enum), and subsequently used to overwrite
the OutputBpp parameter calculated by DML. Seems like this had no
effect except with DSC enabled, which would make DML produce
bad outputs.

[How]
Removed assignment to OutputBpp, fixed output_bpp assignment,
and properly set ForcedOutputLinkBPP instead of OutputBpp.
Also removed condition in DML that prevented forcing of
Output BPP with DSC enabled.

Signed-off-by: Ilya Bakoulin &lt;Ilya.Bakoulin@amd.com&gt;
Reviewed-by: Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Drive-by fixes for display_mode_vba</title>
<updated>2019-06-22T14:34:13Z</updated>
<author>
<name>Ilya Bakoulin</name>
</author>
<published>2019-05-03T16:59:35Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a746a2585542179bf9ec37c5243a10a6490ba41d'/>
<id>urn:sha1:a746a2585542179bf9ec37c5243a10a6490ba41d</id>
<content type='text'>
Fixes for the following:
- Incorrect pointer type (unsigned int instead of double)
- Incorrect DSC number of slices setting

Signed-off-by: Ilya Bakoulin &lt;Ilya.Bakoulin@amd.com&gt;
Reviewed-by: Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: used optimum VSTARTUP instead of MaxVStartup</title>
<updated>2019-06-22T14:34:12Z</updated>
<author>
<name>Charlene Liu</name>
</author>
<published>2019-04-26T04:29:13Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8bb3d7e7b5de731a990af8fe6d99a30751602f15'/>
<id>urn:sha1:8bb3d7e7b5de731a990af8fe6d99a30751602f15</id>
<content type='text'>
[Description]
Features that are desirable for minimizing the Global Sync Period:
DRR and lateflip

Signed-off-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Reviewed-by: Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;
Acked-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix LB BPP and Cursor width</title>
<updated>2019-06-22T14:34:12Z</updated>
<author>
<name>Ilya Bakoulin</name>
</author>
<published>2019-04-17T18:48:25Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ed07237c0c480902a00cdf18a527849a4a9c75bf'/>
<id>urn:sha1:ed07237c0c480902a00cdf18a527849a4a9c75bf</id>
<content type='text'>
DCN2.0 LB BPP should be 48 or 16BPC and max cursor width should be 256.

Also use populate_dml_pipes as functions pointer instead of using it directly

Signed-off-by: Ilya Bakoulin &lt;Ilya.Bakoulin@amd.com&gt;
Reviewed-by: Eric Bernstein &lt;Eric.Bernstein@amd.com&gt;
Acked-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Properly guard display_mode_vba with DCN2</title>
<updated>2019-06-22T14:34:09Z</updated>
<author>
<name>Leo Li</name>
</author>
<published>2019-03-26T01:11:07Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=776c1f569f94e39a1776c22f29137661f294ff03'/>
<id>urn:sha1:776c1f569f94e39a1776c22f29137661f294ff03</id>
<content type='text'>
[Why]

display_mode_vba is for DCN2 and up. When building for upstream (DCN1
enabled only), there will be a build error, since display_mode_vba.c/h
is stripped out.

Note that building DCN1 only with internal dal-dev is still fine, since
display_mode_vba.h is not stripped out internally - only in upstream.
The make directives therefore stll work, and so will any #include's.

[How]

Since subsequent generations require DCN2 enabled anyways, guard the
makefile directive for display_mode_vba.o with DCN2. Guard any includes
with DCN2. In addition, guard the entire contents of display_mode_vba.h
with DCN2, to simulate the file being stripped out in upstream.

A forward declaration for 'struct display_mode_lib' also needs to be
added in display_mode_lib.h. Previously, display_mode_vba.h contained
the forward declaration, and display_mode_lib.h in turn included it.
This won't work if mode_vba.h is stripped out, requring mode_lib.h to do
so itself.

Signed-off-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Reviewed-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Acked-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Guard DML_FAIL_DSC_VALIDATION_FAILURE</title>
<updated>2019-06-22T14:34:09Z</updated>
<author>
<name>Leo Li</name>
</author>
<published>2019-03-28T16:14:05Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=10b3aa5eb1ea2fc810d2b7fc1947c8f0f8ddf55a'/>
<id>urn:sha1:10b3aa5eb1ea2fc810d2b7fc1947c8f0f8ddf55a</id>
<content type='text'>
[Why]
Usage of this enum is DSC-only.

[How]
Guard it with CONFIG_DRM_AMD_DC_DSC_SUPPORT.

Signed-off-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Reviewed-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Acked-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
