<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/gpu/drm/amd/display/dc/dml2, branch linux-6.8.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.8.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.8.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2024-04-03T13:32:42Z</updated>
<entry>
<title>drm/amd/display: Set DCN351 BB and IP the same as DCN35</title>
<updated>2024-04-03T13:32:42Z</updated>
<author>
<name>Xi Liu</name>
</author>
<published>2024-02-27T18:39:00Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e2e013b5c9de7e244e502bbc2f6e785ed82bcdd6'/>
<id>urn:sha1:e2e013b5c9de7e244e502bbc2f6e785ed82bcdd6</id>
<content type='text'>
commit 0ccc2b30f4feadc0b1a282dbcc06e396382e5d74 upstream.

[WHY &amp; HOW]
DCN351 and DCN35 should use the same bounding box and IP settings.

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Jun Lei &lt;jun.lei@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Xi Liu &lt;xi.liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Init DPPCLK from SMU on dcn32</title>
<updated>2024-04-03T13:32:27Z</updated>
<author>
<name>Dillon Varone</name>
</author>
<published>2024-02-21T18:21:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3919e42e71f92c273208bde4169a46decc5d9020'/>
<id>urn:sha1:3919e42e71f92c273208bde4169a46decc5d9020</id>
<content type='text'>
[ Upstream commit 4f5b8d78ca43fcc695ba16c83ebfabbfe09506d6 ]

[WHY &amp; HOW]
DPPCLK ranges should be obtained from the SMU when available.

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Chaitanya Dhere &lt;chaitanya.dhere@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Dillon Varone &lt;dillon.varone@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Change default size for dummy plane in DML2</title>
<updated>2024-04-03T13:32:26Z</updated>
<author>
<name>Swapnil Patel</name>
</author>
<published>2024-02-13T13:09:48Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=afc35ff2726e78dc1f56a3db076d0cca322fa2bd'/>
<id>urn:sha1:afc35ff2726e78dc1f56a3db076d0cca322fa2bd</id>
<content type='text'>
[ Upstream commit 75eb8f7df65c5e6eb22a5aff8deb60ce0b65de1a ]

[WHY &amp; HOW]
Currently, to map dc states into dml_display_cfg,
We create a dummy plane if the stream doesn't have any planes
attached to it. This dummy plane uses max addersable width height.
This results in certain mode validations failing when they shouldn't.

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Chaitanya Dhere &lt;chaitanya.dhere@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Swapnil Patel &lt;swapnil.patel@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Prevent potential buffer overflow in map_hw_resources</title>
<updated>2024-02-27T17:20:42Z</updated>
<author>
<name>Srinivasan Shanmugam</name>
</author>
<published>2024-02-20T03:44:25Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0f8ca019544a252d1afb468ce840c6dcbac73af4'/>
<id>urn:sha1:0f8ca019544a252d1afb468ce840c6dcbac73af4</id>
<content type='text'>
Adds a check in the map_hw_resources function to prevent a potential
buffer overflow. The function was accessing arrays using an index that
could potentially be greater than the size of the arrays, leading to a
buffer overflow.

Adds a check to ensure that the index is within the bounds of the
arrays. If the index is out of bounds, an error message is printed and
break it will continue execution with just ignoring extra data early to
prevent the buffer overflow.

Reported by smatch:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml2_wrapper.c:79 map_hw_resources() error: buffer overflow 'dml2-&gt;v20.scratch.dml_to_dc_pipe_mapping.disp_cfg_to_stream_id' 6 &lt;= 7
drivers/gpu/drm/amd/amdgpu/../display/dc/dml2/dml2_wrapper.c:81 map_hw_resources() error: buffer overflow 'dml2-&gt;v20.scratch.dml_to_dc_pipe_mapping.disp_cfg_to_plane_id' 6 &lt;= 7

Fixes: 7966f319c66d ("drm/amd/display: Introduce DML2")
Cc: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Cc: Roman Li &lt;roman.li@amd.com&gt;
Cc: Qingqing Zhuo &lt;Qingqing.Zhuo@amd.com&gt;
Cc: Aurabindo Pillai &lt;aurabindo.pillai@amd.com&gt;
Cc: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Srinivasan Shanmugam &lt;srinivasan.shanmugam@amd.com&gt;
Suggested-by: Roman Li &lt;roman.li@amd.com&gt;
Reviewed-by: Roman Li &lt;roman.li@amd.com&gt;
Reviewed-by: Rodrigo Siqueira &lt;Rodrigo.Siqueira@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: fix input states translation error for dcn35 &amp; dcn351</title>
<updated>2024-02-22T17:24:57Z</updated>
<author>
<name>Swapnil Patel</name>
</author>
<published>2024-02-06T16:40:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=27a6c49394b1a203beeb94752c9a1d6318f24ddf'/>
<id>urn:sha1:27a6c49394b1a203beeb94752c9a1d6318f24ddf</id>
<content type='text'>
[Why]
Currently there is an error while translating input clock sates into
output clock states. The highest fclk setting from output sates is
being dropped because of this error.

[How]
For dcn35 and dcn351, make output_states equal to input states.

Reviewed-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;rodrigo.siqueira@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Swapnil Patel &lt;swapnil.patel@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix dcn35 8k30 Underflow/Corruption Issue</title>
<updated>2024-01-31T22:33:11Z</updated>
<author>
<name>Fangzhi Zuo</name>
</author>
<published>2024-01-11T19:46:01Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=faf51b201bc42adf500945732abb6220c707d6f3'/>
<id>urn:sha1:faf51b201bc42adf500945732abb6220c707d6f3</id>
<content type='text'>
[why]
odm calculation is missing for pipe split policy determination
and cause Underflow/Corruption issue.

[how]
Add the odm calculation.

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Fangzhi Zuo &lt;jerry.zuo@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Revert "drm/amd/display: initialize all the dpm level's stutter latency"</title>
<updated>2024-01-31T22:23:39Z</updated>
<author>
<name>Charlene Liu</name>
</author>
<published>2024-01-09T16:31:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=514312c07f6cd2f1ffe5a90d42b6080868a03a26'/>
<id>urn:sha1:514312c07f6cd2f1ffe5a90d42b6080868a03a26</id>
<content type='text'>
Revert commit 885c71ad791c
("drm/amd/display: initialize all the dpm level's stutter latency")

Because it causes some regression

Reviewed-by: Muhammad Ahmed &lt;ahmed.ahmed@amd.com&gt;
Acked-by: Tom Chung &lt;chiahsuan.chung@amd.com&gt;
Signed-off-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix a switch statement in populate_dml_output_cfg_from_stream_state()</title>
<updated>2024-01-18T21:37:54Z</updated>
<author>
<name>Christophe JAILLET</name>
</author>
<published>2024-01-13T14:58:21Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=05638ff6dd6f0f38734b6b3ee2c7cf15520f5c00'/>
<id>urn:sha1:05638ff6dd6f0f38734b6b3ee2c7cf15520f5c00</id>
<content type='text'>
It is likely that the statement related to 'dml_edp' is misplaced. So move
it in the correct "case SIGNAL_TYPE_EDP".

Fixes: 7966f319c66d ("drm/amd/display: Introduce DML2")
Signed-off-by: Christophe JAILLET &lt;christophe.jaillet@wanadoo.fr&gt;
Signed-off-by: Hamza Mahfooz &lt;hamza.mahfooz@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amd/display: Fix DML2 watermark calculation</title>
<updated>2024-01-18T21:31:52Z</updated>
<author>
<name>Ovidiu Bunea</name>
</author>
<published>2023-12-19T02:40:45Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d3579f5df0536c2f0fabaa3ea80bb2d179884195'/>
<id>urn:sha1:d3579f5df0536c2f0fabaa3ea80bb2d179884195</id>
<content type='text'>
[Why]
core_mode_programming in DML2 should output watermark calculations
to locals, but it incorrectly uses mode_lib

[How]
update code to match HW DML2

Cc: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Reviewed-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Acked-by: Alex Hung &lt;alex.hung@amd.com&gt;
Signed-off-by: Ovidiu Bunea &lt;ovidiu.bunea@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Revert "drm/amd/display: Fix conversions between bytes and KB"</title>
<updated>2024-01-09T20:43:54Z</updated>
<author>
<name>Daniel Miess</name>
</author>
<published>2023-12-20T15:34:32Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=bf282eb92b84709d99186ad5940b9997eb3c1ff2'/>
<id>urn:sha1:bf282eb92b84709d99186ad5940b9997eb3c1ff2</id>
<content type='text'>
This reverts commit d0f639c5869399bf6dde4d694d5f8c0ab8c0ec46.

The previous commit causes failure to light up for 1080p
eDP + 8k HDMI panel combo.

Reviewed-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Acked-by: Rodrigo Siqueira &lt;rodrigo.siqueira@amd.com&gt;
Signed-off-by: Daniel Miess &lt;daniel.miess@amd.com&gt;
Tested-by: Daniel Wheeler &lt;daniel.wheeler@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
