<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/gpu/drm/amd/display/dc/dce110, branch linux-4.20.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.20.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.20.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2019-02-27T09:09:48Z</updated>
<entry>
<title>drm/amd/display: fix PME notification not working in RV desktop</title>
<updated>2019-02-27T09:09:48Z</updated>
<author>
<name>Charlene Liu</name>
</author>
<published>2018-12-12T23:09:16Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ffd480523b25688674b0f3872f3d15e1e4cf16bc'/>
<id>urn:sha1:ffd480523b25688674b0f3872f3d15e1e4cf16bc</id>
<content type='text'>
[ Upstream commit 20300db4aec5ba5edf6f0ad6f7111a51fbea7e10 ]

[Why]
PPLIB not receive the PME when unplug.

Signed-off-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Reviewed-by: Chris Park &lt;Chris.Park@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: fix YCbCr420 blank color</title>
<updated>2019-02-12T19:02:23Z</updated>
<author>
<name>Eric Yang</name>
</author>
<published>2018-11-22T07:07:06Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1509f994e5ed461c435aefa2e5c19394e2690dc2'/>
<id>urn:sha1:1509f994e5ed461c435aefa2e5c19394e2690dc2</id>
<content type='text'>
[ Upstream commit 12750d1647f118496f1da727146f255f5e44d500 ]

[Why]
YCbCr420 packing format uses two chanels for luma, and 1
channel for both chroma component. Our previous implementation
did not account for this and results in every other pixel having
very high luma value, showing greyish color instead of black.

YCbCr444 = &lt;Y1, Cb1, Cr1&gt;; &lt;Y2, Cb2, Cr2&gt; .....
YCbCr420 = &lt;Y1, Y2,  Cb1&gt;; &lt;Y3, Y4,  Cr1&gt; .....

[How]
Program the second channel with the black color value for luma
as well.

Signed-off-by: Eric Yang &lt;Eric.Yang2@amd.com&gt;
Reviewed-by: Hugo Hu &lt;Hugo.Hu@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix 6x4K displays light-up on Vega20 (v2)</title>
<updated>2018-11-29T19:36:03Z</updated>
<author>
<name>Roman Li</name>
</author>
<published>2018-11-27T22:16:37Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c6888879fd55b1ba903c2a770127edbf6aef6f27'/>
<id>urn:sha1:c6888879fd55b1ba903c2a770127edbf6aef6f27</id>
<content type='text'>
[Why]
More than 4x4K didn't lightup on Vega20 due to low dcfclk value.
Powerplay expects valid min requirement for dcfclk from DC.

[How]
Update min_dcfclock_khz based on min_engine_clock value.

v2: backport to 4.20 (Alex)

Reviewed-by: Hersen Wu &lt;hersenxs.wu@amd.com&gt;
Reviewed-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Roman Li &lt;Roman.Li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/display/dce11: only enable FBC when selected</title>
<updated>2018-11-06T21:46:12Z</updated>
<author>
<name>Alex Deucher</name>
</author>
<published>2018-11-02T15:54:27Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5822e9539dc11721b53d74accd4c091b982011d0'/>
<id>urn:sha1:5822e9539dc11721b53d74accd4c091b982011d0</id>
<content type='text'>
Causes a black screen on a Stoney laptop.

Bug: https://bugs.freedesktop.org/show_bug.cgi?id=108577
Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/display: check if fbc is available in set_static_screen_control (v2)</title>
<updated>2018-11-06T21:45:08Z</updated>
<author>
<name>Alex Deucher</name>
</author>
<published>2018-11-02T15:51:50Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=689e7b34234e29e5168894b27b752a4e16ef08c4'/>
<id>urn:sha1:689e7b34234e29e5168894b27b752a4e16ef08c4</id>
<content type='text'>
The value is dependent on whether fbc is available.

v2: only check if num_pipes is valid

Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Disable 4k 60 HDMI on DCE11</title>
<updated>2018-10-25T01:04:18Z</updated>
<author>
<name>David Francis</name>
</author>
<published>2018-09-25T15:23:31Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1a0e348e5693b7acde02e50319b3237657b7981a'/>
<id>urn:sha1:1a0e348e5693b7acde02e50319b3237657b7981a</id>
<content type='text'>
[Why]
Carrizo and Stoney have severe corruption when trying to power
4k 60 monitors over HDMI connectors that support 4k 60.

Carrizo and Stoney require retimers and redrivers to support 4k 60
over HDMI.  This driver does not currently support these.  Thus, 4k 60
HDMI (and all other modes requiring over 300MHz) should be disabled.

[How]
Reduce the dce11 HDMI pixel clock cap to 300000kHz.

Signed-off-by: David Francis &lt;David.Francis@amd.com&gt;
Reviewed-by: Roman Li &lt;Roman.Li@amd.com&gt;
Acked-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: fix memory leak in resource pools</title>
<updated>2018-10-09T22:03:31Z</updated>
<author>
<name>Jun Lei</name>
</author>
<published>2018-09-18T13:38:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=88ed9fb77ef420cf2e4ec1624f3e638685e28c8d'/>
<id>urn:sha1:88ed9fb77ef420cf2e4ec1624f3e638685e28c8d</id>
<content type='text'>
[why]
ddc engines were recently changed to be independently tracked
from pipe count.  the change was reflected in resource constructor
but not in destructor.  this manifests as a memory leak when
pipe harvesting is enabled, since not all constructed ddc engines
are freed

[how]
make destructor symmetric with constructor for all dcX_resource

Signed-off-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: clean up encoding checks</title>
<updated>2018-10-09T22:02:15Z</updated>
<author>
<name>Eric Yang</name>
</author>
<published>2018-09-14T19:55:01Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e15fc81f11854451ec8a8ed9168b8247e4e9a10b'/>
<id>urn:sha1:e15fc81f11854451ec8a8ed9168b8247e4e9a10b</id>
<content type='text'>
[Why]
All ASICS we support has YCbCr support, so
the check is unnecessary, the currently logic
in validate output also returns true all
the time, so the unneccessary logic is removed

Signed-off-by: Eric Yang &lt;Eric.Yang2@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>BackMerge v4.19-rc6 into drm-next</title>
<updated>2018-10-04T01:03:34Z</updated>
<author>
<name>Dave Airlie</name>
</author>
<published>2018-10-04T01:03:34Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6004f172b375f5747e89afc62ad3baaf1bebd58a'/>
<id>urn:sha1:6004f172b375f5747e89afc62ad3baaf1bebd58a</id>
<content type='text'>
I have some pulls based on rc6, and I prefer to have an explicit backmerge.

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix Vega10 lightup on S3 resume</title>
<updated>2018-09-27T15:03:12Z</updated>
<author>
<name>Roman Li</name>
</author>
<published>2018-09-26T17:42:16Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=599760d6d0abbab71f9726b49858d2ec45e74c0a'/>
<id>urn:sha1:599760d6d0abbab71f9726b49858d2ec45e74c0a</id>
<content type='text'>
[Why]
There have been a few reports of Vega10 display remaining blank
after S3 resume. The regression is caused by workaround for mode
change on Vega10 - skip set_bandwidth if stream count is 0.
As a result we skipped dispclk reset on suspend, thus on resume
we may skip the clock update assuming it hasn't been changed.
On some systems it causes display blank or 'out of range'.

[How]
Revert "drm/amd/display: Fix Vega10 black screen after mode change"
Verified that it hadn't cause mode change regression.

Signed-off-by: Roman Li &lt;Roman.Li@amd.com&gt;
Reviewed-by: Sun peng Li &lt;Sunpeng.Li@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
