<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/gpu/drm/amd/display/dc/calcs, branch linux-4.20.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.20.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.20.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2018-09-27T02:09:06Z</updated>
<entry>
<title>drm/amd/display: program v_update and v_ready with proper field</title>
<updated>2018-09-27T02:09:06Z</updated>
<author>
<name>Su Sung Chung</name>
</author>
<published>2018-09-07T20:51:42Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=fb2b1ea325b411262031435c951d189a75de94b9'/>
<id>urn:sha1:fb2b1ea325b411262031435c951d189a75de94b9</id>
<content type='text'>
[WHY]
There are two different variables used to calculate v_update and v_ready,
one for validation and the other for performance parameter calculation.
Before the variable for validation was used which caused underflow on
1080edp with vsr enabled

[HOW]
program v_update and v_ready with the variables for performance parameter
calculation

Signed-off-by: Su Sung Chung &lt;su.chung@amd.com&gt;
Reviewed-by: Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;
Acked-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Fix 3D stereo issues.</title>
<updated>2018-09-14T20:46:52Z</updated>
<author>
<name>Charlene Liu</name>
</author>
<published>2018-08-27T15:31:08Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d77f778e59ca858e1fb1e9d4946080d689c04711'/>
<id>urn:sha1:d77f778e59ca858e1fb1e9d4946080d689c04711</id>
<content type='text'>
We were not providing the correct pixel clocks to DML for marks
calculation.

Signed-off-by: Charlene Liu &lt;charlene.liu@amd.com&gt;
Reviewed-by: Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Move PME to function pointer call semantics</title>
<updated>2018-08-27T16:09:48Z</updated>
<author>
<name>Jun Lei</name>
</author>
<published>2018-07-16T14:40:31Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=265f5ba6c209875081da7c5f7affe8c2c1913a75'/>
<id>urn:sha1:265f5ba6c209875081da7c5f7affe8c2c1913a75</id>
<content type='text'>
[why]
Legacy IRI style is not linux friendly.

[how]
New function pointer call
semantics will be used for all future PPLIB/DAL interfaces, and also
some existing will be refactored.  This change defines how the
new function pointer structures will look, as well as implements

Signed-off-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Bhawanpreet Lakha &lt;Bhawanpreet.Lakha@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Revert "drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86"</title>
<updated>2018-08-21T19:32:28Z</updated>
<author>
<name>Leo (Sunpeng) Li</name>
</author>
<published>2018-08-16T19:44:38Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=dc37a9a08d5760e405ffdd94ec6bbb6efededba6'/>
<id>urn:sha1:dc37a9a08d5760e405ffdd94ec6bbb6efededba6</id>
<content type='text'>
This reverts commit 8624c3c4dbfe24fc6740687236a2e196f5f4bfb0.

We need CONFIG_DRM_AMD_DC_DCN1_0 to guard code that is using fp math.

Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Signed-off-by: Leo (Sunpeng) Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: separate dc_debug into dc_debug_options and dc_debug data</title>
<updated>2018-07-24T20:15:59Z</updated>
<author>
<name>Jun Lei</name>
</author>
<published>2018-07-12T14:35:01Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=cfd84fd36531b2f1de01b3530b6953ed34ed2c95'/>
<id>urn:sha1:cfd84fd36531b2f1de01b3530b6953ed34ed2c95</id>
<content type='text'>
[why]
confusing as to which part of debug is informational, and which part causes behavioral change

Signed-off-by: Jun Lei &lt;Jun.Lei@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Leo Li &lt;sunpeng.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/display: Replace CONFIG_DRM_AMD_DC_DCN1_0 with CONFIG_X86</title>
<updated>2018-07-19T18:56:43Z</updated>
<author>
<name>Michel Dänzer</name>
</author>
<published>2018-07-17T10:37:45Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=4841203102a337b4b627e6dd3a1dc8c88aec982b'/>
<id>urn:sha1:4841203102a337b4b627e6dd3a1dc8c88aec982b</id>
<content type='text'>
Allowing CONFIG_DRM_AMD_DC_DCN1_0 to be disabled on X86 was an
opportunity for display with Raven Ridge accidentally not working.

Reviewed-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Michel Dänzer &lt;michel.daenzer@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: dcc always on for bw calculations on raven</title>
<updated>2018-07-13T19:48:55Z</updated>
<author>
<name>Dmytro Laktyushkin</name>
</author>
<published>2018-06-13T17:58:14Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=30cdbfaa6aa469347db7fcda5949f1ccf7559ecf'/>
<id>urn:sha1:30cdbfaa6aa469347db7fcda5949f1ccf7559ecf</id>
<content type='text'>
Signed-off-by: Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;
Reviewed-by: Charlene Liu &lt;Charlene.Liu@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Convert remaining loggers off dc_logger</title>
<updated>2018-07-13T19:48:42Z</updated>
<author>
<name>Nicholas Kazlauskas</name>
</author>
<published>2018-06-19T13:58:24Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e1cb3e4801e6896ba93d63222b1052199d2a8c9b'/>
<id>urn:sha1:e1cb3e4801e6896ba93d63222b1052199d2a8c9b</id>
<content type='text'>
- Removed dal/dm/dc loggers from linux, switched to kernel prints
- Modified functions that used these directly to use macros
- dc_logger support is completely dropped from Linux

Signed-off-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Reviewed-by: Harry Wentland &lt;Harry.Wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Allow option to use worst-case watermark</title>
<updated>2018-07-05T21:38:45Z</updated>
<author>
<name>Tony Cheng</name>
</author>
<published>2018-06-08T21:36:26Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f3efec54ed6ac05ba63be1bd93bd741d41b6eb37'/>
<id>urn:sha1:f3efec54ed6ac05ba63be1bd93bd741d41b6eb37</id>
<content type='text'>
use worse case watermark (consider both DCC and VM)
to keep golden consistent regardless of DCC

Signed-off-by: Tony Cheng &lt;tony.cheng@amd.com&gt;
Reviewed-by: Aric Cyr &lt;Aric.Cyr@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: remove dcn1 watermark sets b, c and d</title>
<updated>2018-07-05T21:38:42Z</updated>
<author>
<name>Dmytro Laktyushkin</name>
</author>
<published>2018-06-05T11:19:08Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=69d6bb171fe15f564adfbc485e77dd8c5ca953d5'/>
<id>urn:sha1:69d6bb171fe15f564adfbc485e77dd8c5ca953d5</id>
<content type='text'>
Currently dcn1 will not switch between watermark sets so we can
save time by not calculating 3 extra sets.

Signed-off-by: Dmytro Laktyushkin &lt;Dmytro.Laktyushkin@amd.com&gt;
Reviewed-by: Tony Cheng &lt;Tony.Cheng@amd.com&gt;
Acked-by: Harry Wentland &lt;harry.wentland@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
