kernel.git/drivers/gpu/drm/amd/display/dc/bios, branch linux-6.8.y

drm/amd/display: Atom Integrated System Info v2_2 for DCN35

2024-05-17T10:14:57Z

[ Upstream commit 9a35d205f466501dcfe5625ca313d944d0ac2d60 ] New request from KMD/VBIOS in order to support new UMA carveout model. This fixes a null dereference from accessing Ctx->dc_bios->integrated_info while it was NULL. DAL parses through the BIOS and extracts the necessary integrated_info but was missing a case for the new BIOS version 2.3. Reviewed-by: Nicholas Kazlauskas Acked-by: Aurabindo Pillai Signed-off-by: Gabe Teeger Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher Signed-off-by: Sasha Levin

drm/amd/display: fixed integer types and null check locations

2024-02-15T19:18:43Z

[why]: issues fixed: - comparison with wider integer type in loop condition which can cause infinite loops - pointer dereference before null check Cc: Mario Limonciello Cc: Alex Deucher Cc: stable@vger.kernel.org Reviewed-by: Josip Pavic Acked-by: Aurabindo Pillai Signed-off-by: Sohaib Nadeem Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Wake DMCUB before sending a command

2023-12-19T19:59:02Z

[Why] We can hang in place trying to send commands when the DMCUB isn't powered on. [How] For functions that execute within a DC context or DC lock we can wrap the direct calls to dm_execute_dmub_cmd/list with code that exits idle power optimizations and reallows once we're done with the command submission on success. For DM direct submissions the DM will need to manage the enter/exit sequencing manually. We cannot invoke a DMCUB command directly within the DM execution helper or we can deadlock. Cc: Mario Limonciello Cc: Alex Deucher Cc: stable@vger.kernel.org Reviewed-by: Hansen Dsouza Acked-by: Wayne Lin Signed-off-by: Nicholas Kazlauskas Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: get dprefclk ss info from integration info table

2023-12-19T19:59:02Z

[why & how] we have two SSC_En: we get ssc_info from dce_info for MPLL_SSC_EN. we used to call VBIOS cmdtbl's smu_info's SS persentage for DPRECLK SS info, is used for DP AUDIO and VBIOS' smu_info table was from systemIntegrationInfoTable. since dcn35 VBIOS removed smu_info, driver need to use integrationInfotable directly. Reviewed-by: Nicholas Kazlauskas Acked-by: Wayne Lin Signed-off-by: Charlene Liu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Revert " drm/amd/display: Use channel_width = 2 for vram table 3.0"

2023-12-15T17:17:19Z

[Description] Revert commit fec05adc40c2 ("drm/amd/display: Use channel_width = 2 for vram table 3.0") Because the issue is being fixed from VBIOS side. Reviewed-by: Samson Tam Acked-by: Wayne Lin Signed-off-by: Alvin Lee Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher

drm/amd/display: Remove minor revision 5 until proper parser is ready

2023-12-13T20:09:53Z

Reviewed-by: Dillon Varone Acked-by: Aurabindo Pillai Signed-off-by: Joshua Aberback Signed-off-by: Alex Deucher

drm/amd/display: Adjust code style

2023-12-06T20:22:36Z

This simple commit adjusts part of the code style in some of the dc bios files. Tested-by: Daniel Wheeler Reviewed-by: Aurabindo Pillai Signed-off-by: Rodrigo Siqueira Signed-off-by: Alex Deucher

drm/amd/display: Update BIOS FW info table revision

2023-12-06T20:22:33Z

[Why] BIOS FW info version 3.5 is introduced to support new ASICs, but it's content is currently same as 3.4. [How] Include minor version 5 in parsing to enable support. Tested-by: Daniel Wheeler Reviewed-by: Dillon Varone Acked-by: Rodrigo Siqueira Signed-off-by: Chris Park Signed-off-by: Alex Deucher

drm/amd/display: Use channel_width = 2 for vram table 3.0

2023-12-06T20:22:33Z

VBIOS has suggested to use channel_width=2 for any ASIC that uses vram info 3.0. This is because channel_width in the vram table no longer represents the memory width Tested-by: Daniel Wheeler Reviewed-by: Samson Tam Acked-by: Rodrigo Siqueira Signed-off-by: Alvin Lee Signed-off-by: Alex Deucher

drm/amd/display: Pass pwrseq inst for backlight and ABM

2023-12-06T20:22:33Z

[Why] OTG inst and pwrseq inst mapping is not align therefore we cannot use otg_inst as pwrseq inst to get DCIO register. [How] 1. Pass the correct pwrseq instance to dmub when set abm pipe. 2. LVTMA control index change from panel_inst to pwrseq_inst. Tested-by: Daniel Wheeler Reviewed-by: Phil Hsieh Acked-by: Rodrigo Siqueira Signed-off-by: Lewis Huang Signed-off-by: Alex Deucher