kernel.git/drivers/gpu/drm/amd/amdgpu/soc15.c, branch linux-4.19.yHosts the 0x221E linux distro kernel.
https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.19.y2020-02-28T15:38:50Zdrm/amdgpu/soc15: fix xclk for raven2020-02-28T15:38:50ZAlex Deucher2020-02-12T06:46:16Zurn:sha1:8300ed5a21752ae1ef245119201536916e3fa086
commit c657b936ea98630ef5ba4f130ab1ad5c534d0165 upstream.
It's 25 Mhz (refclk / 4). This fixes the interpretation
of the rlc clock counter.
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drm/amdgpu: typo fix for vega20 cg flags2018-05-30T17:37:05ZEvan Quan2018-05-28T01:22:09Zurn:sha1:102e494001c70901a1de212469d3c8d48dbb301a
The AMD_CG_SUPPORT_HDP_LS was wrongly written as
AMD_CG_SUPPORT_BIF_LS.
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Enable VCN static PG by default on RV2018-05-24T15:07:51ZRex Zhu2018-05-17T08:03:47Zurn:sha1:61c8e90d965ba944d8b56c29c2c7bb9ec34f45d5
Enable static VCN powergating by default on Raven.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Enable VCN CG by default on RV2018-05-24T15:07:51ZRex Zhu2018-05-17T03:13:51Zurn:sha1:79953a60e4476be90fa1767fbf49a76b6a8b01ef
Enable VCN clockgating by default on Raven.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Switch to use df_v3_6_funcs for vega20 (v2)2018-05-18T21:08:15ZFeifei Xu2018-04-04T06:32:10Zurn:sha1:698758bbb3e3e344073f86f2d011cc536d94da49
v2: fix whitespace (Alex)
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/vg20:Enable UVD/VCE for Vega202018-05-18T21:08:14ZJames Zhu2018-04-30T12:43:12Zurn:sha1:705e98d77bc61d234ef5a1867acb38f6d0d40e4f
Vega20 ucode load type is set to AMDGPU_FW_LOAD_DIRECT for default.
So UVD/VCE needn't PSP IP block up. UVD/VCE for Vega20 can be enabled
at this moment.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Disable ip modules that are not ready yet2018-05-18T21:08:11ZFeifei Xu2018-04-24T03:20:16Zurn:sha1:602ed6c69b128b77050e178aca9e945d969f3aa8
Please enable above ips on soc15.c when they're available.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/powerplay: update vega20 cg flags (v2)2018-05-18T21:08:11ZEvan Quan2018-03-26T03:43:04Zurn:sha1:3fdbab5f5689a656fa719df752ca7608bcf66c99
v2: remove duplicate flag.
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: Add nbio support for vega20 (v2)2018-05-17T15:13:18ZFeifei Xu2018-03-23T19:44:28Zurn:sha1:a95d89e2d8e268d90d0f97c9c57d61006eec78c3
Some register offset in nbio v7.4 are different with v7.0.
v2: Use nbio7.0 for now.
TODO: add a new nbio 7.4 module (Alex)
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/soc15: Add ip blocks for vega20 (v2)2018-05-17T15:13:18ZFeifei Xu2018-04-20T10:35:42Zurn:sha1:7c7af6c10d5dc733c2f181f653cb0a5b64e372a5
Same as vega10 now.
v2: squash in typo fix
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>