kernel.git/drivers/gpu/drm/amd/amdgpu/mes_userqueue.c, branch linux-6.17.yHosts the 0x221E linux distro kernel.
https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.17.y2025-12-18T12:59:26Zdrm/amdgpu/userq: fix SDMA and compute validation2025-12-18T12:59:26ZAlex Deucher2025-10-10T19:21:02Zurn:sha1:7a5154dabbf0319a4b69c9b7f54c66fa194f81d6
[ Upstream commit a0559012a18a5a6ad87516e982892765a403b8ab ]
The CSA and EOP buffers have different alignement requirements.
Hardcode them for now as a bug fix. A proper query will be added in
a subsequent patch.
v2: verify gfx shadow helper callback (Prike)
Fixes: 9e46b8bb0539 ("drm/amdgpu: validate userq buffer virtual address and size")
Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drm/amdgpu: add userq object va track helpers2025-12-18T12:59:26ZPrike Liang2025-09-29T05:52:13Zurn:sha1:26b8badb2b582274b358ee1fc6f2c96d8edcaa2d
[ Upstream commit 5cfa33fabf01f2cc0af6b1feed6e65cb81806a37 ]
Add the userq object virtual address list_add() helpers
for tracking the userq obj va address usage.
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Stable-dep-of: a0559012a18a ("drm/amdgpu/userq: fix SDMA and compute validation")
Signed-off-by: Sasha Levin <sashal@kernel.org>
drm/amdgpu: validate userq buffer virtual address and size2025-11-13T20:37:23ZPrike Liang2025-06-23T08:29:38Zurn:sha1:5a577de86c4a1c67ca405571d6ef84e65c6897d1
[ Upstream commit 9e46b8bb0539d7bc9a9e7b3072fa4f6082490392 ]
It needs to validate the userq object virtual address to
determine whether it is residented in a valid vm mapping.
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drm/amdgpu: validate userq input args2025-11-13T20:37:17ZPrike Liang2025-05-14T04:43:57Zurn:sha1:bdaa7ad3a5bb606d7dbd5c8627dc7efcb2392eb9
[ Upstream commit 219be4711a1ba788bc2a9fafc117139d133e5fea ]
This will help on validating the userq input args, and
rejecting for the invalid userq request at the IOCTLs
first place.
Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drm/amdgpu/userq: use consistent function naming2025-04-22T12:51:46ZAlex Deucher2025-04-16T21:49:45Zurn:sha1:42a66677805d03df9e2600fab82d0cbe855500e1
s/userqueue/userq/
1. remove the mix of amdgpu_userqueue and amdgpu_userq
2. to be consistent with other amdgpu_userq_fence.c
3. it's shorter
Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: switch from queue_active to queue state2025-04-22T12:51:45ZAlex Deucher2025-04-12T16:59:38Zurn:sha1:e67b95f0cd5e8dd57a9df5d5d15da6ba7847808a
Track the state of the queue rather than simple active vs
not. This is needed for other states (hung, preempted, etc.).
While we are at it, move the state tracking into the user
queue front end code.
Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/userq/mes: pass the secure flag to mqd init2025-04-22T12:51:44ZAlex Deucher2025-02-27T02:25:22Zurn:sha1:87ceff6136dbbfc8d530a1be7e3ba1282548d6dc
So that we initialize the MQD as a secure queue.
Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Jesse.Zhang <Jesse.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/userq/mes: handle user queue priority2025-04-21T14:56:42ZAlex Deucher2025-02-27T03:47:11Zurn:sha1:23a650bb9f248133095a2e4d7ba7bcbdba9798ab
Handle the queue priority set by the user.
Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Jesse.Zhang <Jesse.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/userq: move runpm handling into core userq code2025-04-21T14:52:49ZAlex Deucher2025-04-11T19:49:51Zurn:sha1:987718c5598a3044ecca1b6f774900df12927ed5
Pull it out of the MES code and into the generic code.
It's not MES specific and needs to be applied to all user
queues regardless of the backend.
Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>
Reviewed-by: Shaoyun.liu <Shaoyun.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu/userq: rework front end call sequence2025-04-21T14:49:16ZAlex Deucher2025-02-21T19:47:00Zurn:sha1:b0db33c8c50f5e89557d4b11da94820677f0c9a2
Split out the queue map from the mqd create call and split
out the queue unmap from the mqd destroy call. This splits
the queue setup and teardown with the actual enablement
in the firmware.
Reviewed-by: Sunil Khatri <sunil.khatri@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>