<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.h, branch linux-6.14.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.14.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.14.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2024-11-20T14:36:48Z</updated>
<entry>
<title>drm/amd/pm: Get xgmi link status for XGMI_v_6_4_0</title>
<updated>2024-11-20T14:36:48Z</updated>
<author>
<name>Asad Kamal</name>
</author>
<published>2024-11-11T13:16:01Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=466a59abacc6590487faf21bd572d704f7283d47'/>
<id>urn:sha1:466a59abacc6590487faf21bd572d704f7283d47</id>
<content type='text'>
Get XGMI_v_6_4_0 link status and populate it to metrics v1_7 for
SMU_v_13_0_6

v2: Get link status register value for each soc from separate
function (Lijo)

Signed-off-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: sever xgmi io link if host driver has disable sharing</title>
<updated>2024-10-24T22:06:34Z</updated>
<author>
<name>Jonathan Kim</name>
</author>
<published>2024-09-20T15:46:05Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e46738a58f87fc03962ce907f81e69dcd93f88f5'/>
<id>urn:sha1:e46738a58f87fc03962ce907f81e69dcd93f88f5</id>
<content type='text'>
Host drivers can create partial hives per guest by disabling xgmi sharing
between certain peers in the main hive.
Typically, these partial hives are fully connected per guest session.
In the event that the host makes a mistake by adding a non-shared node
to a guest session, have the KFD reflect sharing disabled by severing
the IO link.

Signed-off-by: Jonathan Kim &lt;jonathan.kim@amd.com&gt;
Tested-by: James Yao &lt;yiqing.yao@amd.com&gt;
Reviewed-by: Harish Kasiviswanathan &lt;harish.kasiviswanathan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Place NPS mode request on unload</title>
<updated>2024-10-15T15:16:20Z</updated>
<author>
<name>Lijo Lazar</name>
</author>
<published>2024-09-20T07:44:40Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ee52489d1210dbb894fda71957e1e9832126efda'/>
<id>urn:sha1:ee52489d1210dbb894fda71957e1e9832126efda</id>
<content type='text'>
If a user has requested NPS mode switch, place the request through PSP
during unload of the driver. For devices which are part of a hive, all
requests are placed together. If one of them fails, revert back to the
current NPS mode.

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Rajneesh Bhardwaj &lt;rajneesh.bhardwaj@amd.com&gt;
Reviewed-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add gmc interface to request NPS mode</title>
<updated>2024-10-07T18:32:23Z</updated>
<author>
<name>Lijo Lazar</name>
</author>
<published>2024-09-19T13:21:07Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=bbc160084edad8db569f6af0291e0ff9a8f41c0c'/>
<id>urn:sha1:bbc160084edad8db569f6af0291e0ff9a8f41c0c</id>
<content type='text'>
Add a common interface in GMC to request NPS mode through PSP. Also add
a variable in hive and gmc control to track the last requested mode.

Signed-off-by: Rajneesh Bhardwaj &lt;rajneesh.bhardwaj@amd.com&gt;
Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Refactor XGMI reset on init handling</title>
<updated>2024-09-26T21:06:46Z</updated>
<author>
<name>Lijo Lazar</name>
</author>
<published>2024-08-26T13:22:14Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=631af731ee9cc7f5a5c0ab1de94da68195920214'/>
<id>urn:sha1:631af731ee9cc7f5a5c0ab1de94da68195920214</id>
<content type='text'>
Use XGMI hive information to rely on resetting XGMI devices on
initialization rather than using mgpu structure. mgpu structure may have
other devices as well.

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Feifei Xu &lt;feifxu@amd.com&gt;
Acked-by: Rajneesh Bhardwaj &lt;rajneesh.bhardwaj@amd.com&gt;
Tested-by: Rajneesh Bhardwaj &lt;rajneesh.bhardwaj@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add ras event id support</title>
<updated>2024-03-20T17:38:13Z</updated>
<author>
<name>Yang Wang</name>
</author>
<published>2024-03-13T04:50:43Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=9dc57c2adf2c307a672f15b4be17c6c14e37cfb9'/>
<id>urn:sha1:9dc57c2adf2c307a672f15b4be17c6c14e37cfb9</id>
<content type='text'>
add amdgpu ras event id support to better distinguish different
error information sources in dmesg logs.

the following log will be identify by event id:
{event_id} interrupt to inform RAS event
{event_id} ACA logs
{event_id} errors statistic since from current injection/error query
{event_id} errors statistic since from gpu load

Signed-off-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: revert "Adjust removal control flow for smu v13_0_2"</title>
<updated>2024-01-18T21:43:42Z</updated>
<author>
<name>Christian König</name>
</author>
<published>2024-01-10T14:19:29Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=fb1c93c2e9604a884467a773790016199f78ca08'/>
<id>urn:sha1:fb1c93c2e9604a884467a773790016199f78ca08</id>
<content type='text'>
Calling amdgpu_device_ip_resume_phase1() during shutdown leaves the
HW in an active state and is an unbalanced use of the IP callbacks.

Using the IP callbacks like this can lead to memory leaks, double
free and imbalanced reference counters.

Leaving the HW in an active state can lead to DMA accesses to memory now
freed by the driver.

Both is a complete no-go for driver unload so completely revert the
workaround for now.

This reverts commit f5c7e7797060255dbc8160734ccc5ad6183c5e04.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu : Add hive ras recovery check</title>
<updated>2023-10-19T22:26:51Z</updated>
<author>
<name>Asad Kamal</name>
</author>
<published>2023-10-05T07:40:42Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=53dd920c1f471a5763c660a7b94fe0aaf746d357'/>
<id>urn:sha1:53dd920c1f471a5763c660a7b94fe0aaf746d357</id>
<content type='text'>
If one of the devices in the hive detects a
fatal error, need to send ras recovery reset
message to PMFW of all devices in the hive.
For that add a flag in hive to indicate that
it's undergoing ras recovery

Signed-off-by: Asad Kamal &lt;asad.kamal@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Rework xgmi_wafl_pcs ras sw_init</title>
<updated>2023-03-15T22:45:27Z</updated>
<author>
<name>Hawking Zhang</name>
</author>
<published>2023-03-04T11:54:14Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=da9d669eab152dbd6e9410606a7c8c8a212a7959'/>
<id>urn:sha1:da9d669eab152dbd6e9410606a7c8c8a212a7959</id>
<content type='text'>
To align with other IP blocks.

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Stanley Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Adjust removal control flow for smu v13_0_2</title>
<updated>2022-09-19T19:17:20Z</updated>
<author>
<name>YiPeng Chai</name>
</author>
<published>2022-09-07T08:07:42Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f5c7e7797060255dbc8160734ccc5ad6183c5e04'/>
<id>urn:sha1:f5c7e7797060255dbc8160734ccc5ad6183c5e04</id>
<content type='text'>
Adjust removal control flow for smu v13_0_2:
   During amdgpu uninstallation, when removing the first
device, the kernel needs to first send a mode1reset message
to all gpu devices. Otherwise, smu initialization will fail
the next time amdgpu is installed.

V2:
1. Update commit comments.
2. Remove the global variable amdgpu_device_remove_cnt
   and add a variable to the structure amdgpu_hive_info.
3. Use hive to detect the first removed device instead of
   a global variable.

V3:
 1. Update commit comments.
 2. Split a patch into multiple patches.
 3. The current patch does:
    a. Add a work mode of AMDGPU_RESET_FOR_DEVICE_REMOVE into
       the existing gpu recover path, which make all devices
       in hive list only have HW reset but no resume (except
       the base IP).
    b. Call AMDGPU_RESET_FOR_DEVICE_REMOVE and
       AMDGPU_NEED_FULL_RESET mode of amdgpu_device_gpu_recover
       in amdgpu_pci_remove when removing the first device in
       hive list.
    c. When removing the first device, the IP blocks keyword
       function call sequence is as follows:
.suspend-&gt;mode1reset-&gt;.resume(basic ip)-&gt;.hw_fini-&gt;.early_fini-&gt;.sw_fini.
   ^                           |
   |-&lt;----------&lt;---------&lt;----|
	The first three sequences are because of a call to
        amdgpu_device_gpu_recover. The three sequences will be
        executed in a loop until all devices in the hive list
        are iterated.
        The sequences starting from .hw_fini only apply to the
        first device. Since .suspend has been called before,
        except the resumed phase1 basic ip blocks, all other ip
        blocks .hw_fini of current device will do nothing.
     d. When removing other devices, the calling sequences is the
        same as legacy:
	   .hw_fini -&gt; .early_fini -&gt; .sw_fini.
	Since .suspend has been called when removing the first device,
        except the resumed phase1 basic ip blocks, all of other ip
        blocks .hw_fini of current device will do nothing.

Signed-off-by: YiPeng Chai &lt;YiPeng.Chai@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
