<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c, branch linux-5.3.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.3.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.3.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2019-10-29T08:22:26Z</updated>
<entry>
<title>drm/amdgpu/vcn: fix allocation size in enc ring test</title>
<updated>2019-10-29T08:22:26Z</updated>
<author>
<name>Alex Deucher</name>
</author>
<published>2019-10-15T22:09:41Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ea387394bcf8cb79ea4313b652bd4d27de17f888'/>
<id>urn:sha1:ea387394bcf8cb79ea4313b652bd4d27de17f888</id>
<content type='text'>
commit c81fffc2c9450750dd7a54a36a788a860ab0425d upstream.

We need to allocate a large enough buffer for the
session info, otherwise the IB test can overwrite
other memory.

- Session info is 128K according to mesa
- Use the same session info for create and destroy

Bug: https://bugzilla.kernel.org/show_bug.cgi?id=204241
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: James Zhu &lt;James.Zhu@amd.com&gt;
Tested-by: James Zhu &lt;James.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>Merge branch 'drm-next' into drm-next-5.3</title>
<updated>2019-06-25T13:42:25Z</updated>
<author>
<name>Alex Deucher</name>
</author>
<published>2019-06-25T13:42:25Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d7929c1e13e3788e7cb741d75b5baec5e53eff21'/>
<id>urn:sha1:d7929c1e13e3788e7cb741d75b5baec5e53eff21</id>
<content type='text'>
Backmerge drm-next and fix up conflicts due to drmP.h removal.

Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/VCN: enable indirect DPG SRAM mode</title>
<updated>2019-06-21T23:59:33Z</updated>
<author>
<name>Leo Liu</name>
</author>
<published>2019-05-27T14:49:19Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=450af30ce23a6fca66686855255a69d9179f42c4'/>
<id>urn:sha1:450af30ce23a6fca66686855255a69d9179f42c4</id>
<content type='text'>
This is default mode for VCN2.x now

Signed-off-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: James Zhu &lt;James.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/VCN: add buffer for indirect SRAM usage</title>
<updated>2019-06-21T23:59:33Z</updated>
<author>
<name>Leo Liu</name>
</author>
<published>2019-05-24T18:07:41Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a77b9fdf9aca3d9d8955487e95cd1e884b45fe1a'/>
<id>urn:sha1:a77b9fdf9aca3d9d8955487e95cd1e884b45fe1a</id>
<content type='text'>
This will be used later for indirect SRAM mode

Signed-off-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: James Zhu &lt;James.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: enable vcn dpm scheme for navi</title>
<updated>2019-06-21T23:59:27Z</updated>
<author>
<name>Jack Xiao</name>
</author>
<published>2019-04-18T10:11:55Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6e4cb4e8b31faf12575ac01dac47d2f87f9ac245'/>
<id>urn:sha1:6e4cb4e8b31faf12575ac01dac47d2f87f9ac245</id>
<content type='text'>
On navi1x, vcn dpm scheme was merged into powergating scheme.

Signed-off-by: Jack Xiao &lt;Jack.Xiao@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/powerplay: set dpm_enabled flag but don't enable vcn dpm</title>
<updated>2019-06-21T23:59:27Z</updated>
<author>
<name>Huang Rui</name>
</author>
<published>2019-05-30T04:18:01Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=948f540cd0120ef9d622af42c1b95f28cf992da0'/>
<id>urn:sha1:948f540cd0120ef9d622af42c1b95f28cf992da0</id>
<content type='text'>
This patch sets dpm_enabled flag but don't enable vcn dpm, because vcn dpm
doesn't work so far and we needs to enable the sysfs interfaces.

Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Acked-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add JPEG2.0 decode ring ib test</title>
<updated>2019-06-21T23:58:22Z</updated>
<author>
<name>Leo Liu</name>
</author>
<published>2018-10-15T20:17:27Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=54bb93c2251ce8fcfd44db491e85f01c17025fb5'/>
<id>urn:sha1:54bb93c2251ce8fcfd44db491e85f01c17025fb5</id>
<content type='text'>
Add internal register offset for registers involving in ib tests

Signed-off-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add JPEG2.0 decode ring test</title>
<updated>2019-06-21T23:58:22Z</updated>
<author>
<name>Leo Liu</name>
</author>
<published>2018-12-03T16:42:28Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=9085914a5af4b3078a0289c4d67ee7cbc45dac99'/>
<id>urn:sha1:9085914a5af4b3078a0289c4d67ee7cbc45dac99</id>
<content type='text'>
Use register from JPEG tile, the UVD tile reg won't work for JPEG

Signed-off-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add VCN2.0 decode ib test</title>
<updated>2019-06-21T23:58:22Z</updated>
<author>
<name>Leo Liu</name>
</author>
<published>2018-10-15T19:41:36Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=60a2309ec465aab22910ddce8e45aaa624f87f5d'/>
<id>urn:sha1:60a2309ec465aab22910ddce8e45aaa624f87f5d</id>
<content type='text'>
Add internal register offset for registers involving in ib tests

Signed-off-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add VCN2.0 decode ring test</title>
<updated>2019-06-21T23:58:22Z</updated>
<author>
<name>Leo Liu</name>
</author>
<published>2018-10-17T18:33:48Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=45a1a48b5c310700d338105df5883e8f8ab1f994'/>
<id>urn:sha1:45a1a48b5c310700d338105df5883e8f8ab1f994</id>
<content type='text'>
Add internal register offset for registers involving in ring tests

Signed-off-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
