<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h, branch linux-6.4.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.4.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.4.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2023-04-11T22:03:44Z</updated>
<entry>
<title>drm/amdgpu: optimize redundant code in umc_v8_10</title>
<updated>2023-04-11T22:03:44Z</updated>
<author>
<name>YiPeng Chai</name>
</author>
<published>2023-03-27T06:23:30Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e86bd8b21d57670e38c23ed435a053e7e4cc9e21'/>
<id>urn:sha1:e86bd8b21d57670e38c23ed435a053e7e4cc9e21</id>
<content type='text'>
Optimize redundant code in umc_v8_10

Signed-off-by: YiPeng Chai &lt;YiPeng.Chai@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Move umc ras block init to gmc ras sw_init</title>
<updated>2023-03-13T21:27:48Z</updated>
<author>
<name>Hawking Zhang</name>
</author>
<published>2023-03-11T09:36:11Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a6dcf9a7ccfed57abd44c24cc505b559281d44b9'/>
<id>urn:sha1:a6dcf9a7ccfed57abd44c24cc505b559281d44b9</id>
<content type='text'>
Initialize umc ras block only when umc ip block
supports ras. Driver queries ras capabilities after
early_init, ras block init needs to be moved to
sw_init.

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Stanley Yang &lt;Stanley.Yang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Support umc node harvest config on umc v8_10</title>
<updated>2023-03-06T20:14:39Z</updated>
<author>
<name>Candice Li</name>
</author>
<published>2023-02-24T09:26:33Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2b595659d5aec797d2f469691cd543e9b3500471'/>
<id>urn:sha1:2b595659d5aec797d2f469691cd543e9b3500471</id>
<content type='text'>
Don't need to query error count and error address on harvest umc nodes.
v2: Fix code bug, use active_mask instead of harvsest_config
    and remove unnecessary argument in LOOP macro.
v3: Leave adev-&gt;gmc.num_umc unchanged.

Signed-off-by: Candice Li &lt;candice.li@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add umc retire unit element</title>
<updated>2023-02-23T22:35:59Z</updated>
<author>
<name>Tao Zhou</name>
</author>
<published>2023-02-17T03:16:10Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e69c785723ed88a930d332e13bc9140dce48f359'/>
<id>urn:sha1:e69c785723ed88a930d332e13bc9140dce48f359</id>
<content type='text'>
It records how many bad pages are retired in one uncorrectable error.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Stanley.Yang &lt;Stanley.Yang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove ras_error_status parameter for UMC poison handler</title>
<updated>2022-10-27T19:12:08Z</updated>
<author>
<name>Tao Zhou</name>
</author>
<published>2022-10-18T02:31:09Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1ed0e176902483e67cd02530d387a7551b0e99a4'/>
<id>urn:sha1:1ed0e176902483e67cd02530d387a7551b0e99a4</id>
<content type='text'>
Make the code simpler.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add RAS page retirement functions for MCA</title>
<updated>2022-10-27T19:12:08Z</updated>
<author>
<name>Tao Zhou</name>
</author>
<published>2022-10-17T10:22:13Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=cbe4d43ea5e903ae3e8555cc39047b0ed027738a'/>
<id>urn:sha1:cbe4d43ea5e903ae3e8555cc39047b0ed027738a</id>
<content type='text'>
Define page retirement functions for MCA platform.

v2: remove page retirement handling from MCA poison handler,
    let MCA notifier do page retirement.

v3: remove specific poison handler for MCA to simplify code.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: move convert_error_address out of umc_ras</title>
<updated>2022-10-17T21:41:21Z</updated>
<author>
<name>Hawking Zhang</name>
</author>
<published>2022-10-14T07:17:43Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6c0ca748205dc815505c6de79ecf565953390b66'/>
<id>urn:sha1:6c0ca748205dc815505c6de79ecf565953390b66</id>
<content type='text'>
RAS error address translation algorithm is common
across dGPU and A + A platform as along as the SOC
integrates the same generation of UMC IP.

UMC RAS is managed by x86 MCA on A + A platform,
umc_ras in GPU driver is not initialized at all on
A + A platform. In such case, any umc_ras callback
implemented for dGPU config shouldn't be invoked
from A + A specific callback.

The change moves convert_error_address out of dGPU
umc_ras structure and makes it share between A + A
and dGPU config.

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Stanley Yang &lt;Stanley.Yang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: define RAS convert_error_address API</title>
<updated>2022-10-11T15:05:17Z</updated>
<author>
<name>Tao Zhou</name>
</author>
<published>2022-09-27T03:36:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=44420ac5f855f5704d8f939926ed145f99e49e55'/>
<id>urn:sha1:44420ac5f855f5704d8f939926ed145f99e49e55</id>
<content type='text'>
Make the code reusable and remove redundant code.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: export umc error address convert interface</title>
<updated>2022-09-29T13:42:15Z</updated>
<author>
<name>Tao Zhou</name>
</author>
<published>2022-09-21T08:25:33Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c19a5f325a7fb5b353976d66d6a92b35c0322138'/>
<id>urn:sha1:c19a5f325a7fb5b353976d66d6a92b35c0322138</id>
<content type='text'>
Make it global so we can convert specific mca address.

v2: rename query_error_address_per_channel to
convert_ras_error_address

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add umc ras functions for umc v8_10_0</title>
<updated>2022-07-18T20:37:47Z</updated>
<author>
<name>YiPeng Chai</name>
</author>
<published>2022-07-04T09:18:14Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e4b1edf48fa37cf4f5ca403e384731fe28d13691'/>
<id>urn:sha1:e4b1edf48fa37cf4f5ca403e384731fe28d13691</id>
<content type='text'>
1. Support query umc ras error counter.
2. Support ras umc ue error address remapping.

Signed-off-by: YiPeng Chai &lt;YiPeng.Chai@amd.com&gt;
Reviewed-by: Alexander Deucher &lt;Alexander.Deucher@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
