<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/fpga/Kconfig, branch linux-4.10.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.10.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.10.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2016-11-29T21:51:44Z</updated>
<entry>
<title>fpga: Add COMPILE_TEST to all drivers</title>
<updated>2016-11-29T21:51:44Z</updated>
<author>
<name>Jason Gunthorpe</name>
</author>
<published>2016-11-21T22:26:42Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a0e1b618585979bf2520a6a6e954a3bb56cd610b'/>
<id>urn:sha1:a0e1b618585979bf2520a6a6e954a3bb56cd610b</id>
<content type='text'>
Like Zynq the Altera drivers compile fine on x86 and others too,
so make it easier to compile test this stuff.

A10 requires REGMAP_MMIO to compile, so be explicit rather than
relying on it via ARCH_SOCFPGA.

Signed-off-by: Jason Gunthorpe &lt;jgunthorpe@obsidianresearch.com&gt;
Acked-by: Alan Tull &lt;atull@opensource.altera.com&gt;
</content>
</entry>
<entry>
<title>fpga-manager: Add Socfpga Arria10 support</title>
<updated>2016-11-10T16:03:36Z</updated>
<author>
<name>Alan Tull</name>
</author>
<published>2016-11-01T19:14:32Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=acbb910ae04b8eed9eec7a69ef4e0979f364ff46'/>
<id>urn:sha1:acbb910ae04b8eed9eec7a69ef4e0979f364ff46</id>
<content type='text'>
Add low level driver to support reprogramming FPGAs for Altera
SoCFPGA Arria10.

Signed-off-by: Alan Tull &lt;atull@opensource.altera.com&gt;
Reviewed-by: Moritz Fischer &lt;moritz.fischer@ettus.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>fpga: add altera freeze bridge support</title>
<updated>2016-11-10T16:03:36Z</updated>
<author>
<name>Alan Tull</name>
</author>
<published>2016-11-01T19:14:31Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ca24a648f535a02b4163ca4f4d2e51869f155a3a'/>
<id>urn:sha1:ca24a648f535a02b4163ca4f4d2e51869f155a3a</id>
<content type='text'>
Add a low level driver for Altera Freeze Bridges to the FPGA Bridge
framework.  A freeze bridge is a bridge that exists in the FPGA
fabric to isolate one region of the FPGA from the busses while that
one region is being reprogrammed.

Signed-off-by: Alan Tull &lt;atull@opensource.altera.com&gt;
Signed-off-by: Matthew Gerlach &lt;mgerlach@opensource.altera.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>ARM: socfpga: fpga bridge driver support</title>
<updated>2016-11-10T16:03:36Z</updated>
<author>
<name>Alan Tull</name>
</author>
<published>2016-11-01T19:14:30Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e5f8efa5c8bf86c1fa698551d54db8f6aee221fd'/>
<id>urn:sha1:e5f8efa5c8bf86c1fa698551d54db8f6aee221fd</id>
<content type='text'>
Supports Altera SOCFPGA bridges:
 * fpga2sdram
 * fpga2hps
 * hps2fpga
 * lwhps2fpga

Allows enabling/disabling the bridges through the FPGA
Bridge Framework API functions.

The fpga2sdram driver only supports enabling and disabling
of the ports that been configured early on.  This is due to
a hardware limitation where the read, write, and command
ports on the fpga2sdram bridge can only be reconfigured
while there are no transactions to the sdram, i.e. when
running out of OCRAM before the kernel boots.

Device tree property 'init-val' configures the driver to
enable or disable the bridge during probe.  If the property
does not exist, the driver will leave the bridge in its
current state.

Signed-off-by: Alan Tull &lt;atull@opensource.altera.com&gt;
Signed-off-by: Matthew Gerlach &lt;mgerlach@altera.com&gt;
Signed-off-by: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>fpga: fpga-region: device tree control for FPGA</title>
<updated>2016-11-10T16:03:35Z</updated>
<author>
<name>Alan Tull</name>
</author>
<published>2016-11-01T19:14:29Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0fa20cdfcc1f68847cdfc47824476301eedc8297'/>
<id>urn:sha1:0fa20cdfcc1f68847cdfc47824476301eedc8297</id>
<content type='text'>
FPGA Regions support programming FPGA under control of the Device
Tree.

Signed-off-by: Alan Tull &lt;atull@opensource.altera.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>fpga: add fpga bridge framework</title>
<updated>2016-11-10T16:03:35Z</updated>
<author>
<name>Alan Tull</name>
</author>
<published>2016-11-01T19:14:28Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=21aeda950c5f84a8351b862816d832120b217a9b'/>
<id>urn:sha1:21aeda950c5f84a8351b862816d832120b217a9b</id>
<content type='text'>
This framework adds API functions for enabling/
disabling FPGA bridges under kernel control.

This allows the Linux kernel to disable FPGA bridges
during FPGA reprogramming and to enable FPGA bridges
when FPGA reprogramming is done.  This framework is
be manufacturer-agnostic, allowing it to be used in
interfaces that use the FPGA Manager Framework to
reprogram FPGA's.

The functions are:
* of_fpga_bridge_get
* fpga_bridge_put
   Get/put an exclusive reference to a FPGA bridge.

* fpga_bridge_enable
* fpga_bridge_disable
   Enable/Disable traffic through a bridge.

* fpga_bridge_register
* fpga_bridge_unregister
   Register/unregister a device-specific low level FPGA
   Bridge driver.

Get an exclusive reference to a bridge and add it to a list:
* fpga_bridge_get_to_list

To enable/disable/put a set of bridges that are on a list:
* fpga_bridges_enable
* fpga_bridges_disable
* fpga_bridges_put

Signed-off-by: Alan Tull &lt;atull@opensource.altera.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>fpga manager: Add hardware dependency to Zynq driver</title>
<updated>2016-09-08T15:31:44Z</updated>
<author>
<name>Jean Delvare</name>
</author>
<published>2016-09-08T14:38:05Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=54e9b099724a135a3c3cba1d90c0f2b7dd037815'/>
<id>urn:sha1:54e9b099724a135a3c3cba1d90c0f2b7dd037815</id>
<content type='text'>
The Zynq FPGA manager driver serves no purpose on other architectures
so hide it unless build-testing.

Signed-off-by: Jean Delvare &lt;jdelvare@suse.de&gt;
Acked-by: Moritz Fischer &lt;moritz.fischer@ettus.com&gt;
Acked-by: Alan Tull &lt;atull@opensource.altera.com&gt;
Acked-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Cc: "Sören Brinkmann" &lt;soren.brinkmann@xilinx.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>drivers/fpga/Kconfig: fix build failure</title>
<updated>2016-08-04T12:50:07Z</updated>
<author>
<name>Sudip Mukherjee</name>
</author>
<published>2016-08-03T20:45:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1c8cb409491403036919dd1c6b45013dc8835a44'/>
<id>urn:sha1:1c8cb409491403036919dd1c6b45013dc8835a44</id>
<content type='text'>
While building m32r allmodconfig the build is failing with the error:

  ERROR: "bad_dma_ops" [drivers/fpga/zynq-fpga.ko] undefined!

Xilinx Zynq FPGA is using DMA but there was no dependency while
building.

Link: http://lkml.kernel.org/r/1464346526-13913-1-git-send-email-sudipm.mukherjee@gmail.com
Signed-off-by: Sudip Mukherjee &lt;sudip.mukherjee@codethink.co.uk&gt;
Acked-by: Moritz Fischer &lt;moritz.fischer@ettus.com&gt;
Cc: Alan Tull &lt;atull@opensource.altera.com&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>fpga manager: Adding FPGA Manager support for Xilinx Zynq 7000</title>
<updated>2015-10-18T04:57:16Z</updated>
<author>
<name>Moritz Fischer</name>
</author>
<published>2015-10-16T22:42:30Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=37784706bf9e3b723898125b47d6f1e76a8db418'/>
<id>urn:sha1:37784706bf9e3b723898125b47d6f1e76a8db418</id>
<content type='text'>
This commit adds FPGA Manager support for the Xilinx Zynq chip.
The code borrows some from the xdevcfg driver in Xilinx'
vendor tree.

Signed-off-by: Moritz Fischer &lt;moritz.fischer@ettus.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>fpga manager: add driver for socfpga fpga manager</title>
<updated>2015-10-07T17:08:15Z</updated>
<author>
<name>Alan Tull</name>
</author>
<published>2015-10-07T15:36:29Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=fab6266e82a8981cccec55af47589665daf69fb6'/>
<id>urn:sha1:fab6266e82a8981cccec55af47589665daf69fb6</id>
<content type='text'>
Add driver to fpga manager framework to allow configuration
of FPGA in Altera SoCFPGA parts.

Signed-off-by: Alan Tull &lt;atull@opensource.altera.com&gt;
Acked-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Acked-by: Moritz Fischer &lt;moritz.fischer@ettus.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
</feed>
