<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/edac/Kconfig, branch linux-5.4.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.4.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.4.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2019-09-22T16:39:09Z</updated>
<entry>
<title>Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm</title>
<updated>2019-09-22T16:39:09Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2019-09-22T16:39:09Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8808cf8cbc4da1ceef9307fba7e499563908c211'/>
<id>urn:sha1:8808cf8cbc4da1ceef9307fba7e499563908c211</id>
<content type='text'>
Pull ARM updates from Russell King:

 - fix various clang build and cppcheck issues

 - switch ARM to use new common outgoing-CPU-notification code

 - add some additional explanation about the boot code

 - kbuild "make clean" fixes

 - get rid of another "(____ptrval____)", this time for the VDSO code

 - avoid treating cache maintenance faults as a write

 - add a frame pointer unwinder implementation for clang

 - add EDAC support for Aurora L2 cache

 - improve robustness of adjust_lowmem_bounds() finding the bounds of
   lowmem.

 - add reset control for AMBA primecell devices

* tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: (24 commits)
  ARM: 8906/1: drivers/amba: add reset control to amba bus probe
  ARM: 8905/1: Emit __gnu_mcount_nc when using Clang 10.0.0 or newer
  ARM: 8904/1: skip nomap memblocks while finding the lowmem/highmem boundary
  ARM: 8903/1: ensure that usable memory in bank 0 starts from a PMD-aligned address
  ARM: 8891/1: EDAC: armada_xp: Add support for more SoCs
  ARM: 8888/1: EDAC: Add driver for the Marvell Armada XP SDRAM and L2 cache ECC
  ARM: 8892/1: EDAC: Add missing debugfs_create_x32 wrapper
  ARM: 8890/1: l2x0: add marvell,ecc-enable property for aurora
  ARM: 8889/1: dt-bindings: document marvell,ecc-enable binding
  ARM: 8886/1: l2x0: support parity-enable/disable on aurora
  ARM: 8885/1: aurora-l2: add defines for parity and ECC registers
  ARM: 8887/1: aurora-l2: add prefix to MAX_RANGE_SIZE
  ARM: 8902/1: l2c: move cache-aurora-l2.h to asm/hardware
  ARM: 8900/1: UNWINDER_FRAME_POINTER implementation for Clang
  ARM: 8898/1: mm: Don't treat faults reported from cache maintenance as writes
  ARM: 8896/1: VDSO: Don't leak kernel addresses
  ARM: 8895/1: visit mach-* and plat-* directories when cleaning
  ARM: 8894/1: boot: Replace open-coded nop with macro
  ARM: 8893/1: boot: Explain the 8 nops
  ARM: 8876/1: fix O= building with CONFIG_FPE_FASTFPE
  ...
</content>
</entry>
<entry>
<title>ARM: 8888/1: EDAC: Add driver for the Marvell Armada XP SDRAM and L2 cache ECC</title>
<updated>2019-08-29T06:58:01Z</updated>
<author>
<name>Jan Luebbe</name>
</author>
<published>2019-07-12T04:46:57Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7f6998a41257a8930ee5b6866ba56a25230841ed'/>
<id>urn:sha1:7f6998a41257a8930ee5b6866ba56a25230841ed</id>
<content type='text'>
Add support for the ECC functionality as found in the DDR RAM and L2
cache controllers on the MV78230/MV78x60 SoCs. This driver has been
tested on the MV78460 (on a custom board with a DDR3 ECC DIMM).

[cp use SPDX license]

Signed-off-by: Jan Luebbe &lt;jlu@pengutronix.de&gt;
Signed-off-by: Chris Packham &lt;chris.packham@alliedtelesis.co.nz&gt;
Reviewed-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Russell King &lt;rmk+kernel@armlinux.org.uk&gt;
</content>
</entry>
<entry>
<title>EDAC, mellanox: Add ECC support for BlueField DDR4</title>
<updated>2019-08-08T15:57:01Z</updated>
<author>
<name>Shravan Kumar Ramani</name>
</author>
<published>2019-06-25T19:13:59Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=82413e562ea6eadfb6de946dcc6f74af31d64e7f'/>
<id>urn:sha1:82413e562ea6eadfb6de946dcc6f74af31d64e7f</id>
<content type='text'>
Add ECC support for Mellanox BlueField SoC DDR controller.
This requires SMC to the running Arm Trusted Firmware to report
what is the current memory configuration.

Reviewed-by: James Morse &lt;james.morse@arm.com&gt;
Signed-off-by: Shravan Kumar Ramani &lt;sramani@mellanox.com&gt;
Signed-off-by: Mauro Carvalho Chehab &lt;mchehab+samsung@kernel.org&gt;
</content>
</entry>
<entry>
<title>EDAC/sifive: Add EDAC platform driver for SiFive SoCs</title>
<updated>2019-06-20T18:44:36Z</updated>
<author>
<name>Yash Shah</name>
</author>
<published>2019-05-06T11:27:06Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=91abaeaaff35d97e88d2249f69f19db749a19a68'/>
<id>urn:sha1:91abaeaaff35d97e88d2249f69f19db749a19a68</id>
<content type='text'>
Add an EDAC driver for SiFive SoCs. The initial version supports ECC
event monitoring and reporting through the EDAC framework for the SiFive
L2 cache controller. It registers for notifier events from the L2 cache
controller driver (arch/riscv/mm/sifive_l2_cache.c) for L2 ECC events.

 [ bp: Massage commit message. ]

Signed-off-by: Yash Shah &lt;yash.shah@sifive.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Reviewed-by: James Morse &lt;james.morse@arm.com&gt;
Cc: Albert Ou &lt;aou@eecs.berkeley.edu&gt;
Cc: "David S. Miller" &lt;davem@davemloft.net&gt;
Cc: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Cc: Jonathan Cameron &lt;Jonathan.Cameron@huawei.com&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: linux-riscv@lists.infradead.org
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: Nicolas Ferre &lt;nicolas.ferre@microchip.com&gt;
Cc: Palmer Dabbelt &lt;palmer@sifive.com&gt;
Cc: "Paul E. McKenney" &lt;paulmck@linux.ibm.com&gt;
Cc: Paul Walmsley &lt;paul.walmsley@sifive.com&gt;
Cc: sachin.ghadi@sifive.com
Link: https://lkml.kernel.org/r/1557142026-15949-2-git-send-email-yash.shah@sifive.com
</content>
</entry>
<entry>
<title>EDAC/mpc85xx: Prevent building as a module</title>
<updated>2019-05-10T18:15:11Z</updated>
<author>
<name>Michael Ellerman</name>
</author>
<published>2019-05-02T14:19:41Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2b8358a951b1e2a534a54924cd8245e58a1c5fb8'/>
<id>urn:sha1:2b8358a951b1e2a534a54924cd8245e58a1c5fb8</id>
<content type='text'>
The mpc85xx EDAC driver can be configured as a module but then fails to
build because it uses two unexported symbols:

  ERROR: ".pci_find_hose_for_OF_device" [drivers/edac/mpc85xx_edac_mod.ko] undefined!
  ERROR: ".early_find_capability" [drivers/edac/mpc85xx_edac_mod.ko] undefined!

We don't want to export those symbols just for this driver, so make the
driver only configurable as a built-in.

This seems to have been broken since at least

  c92132f59806 ("edac/85xx: Add PCIe error interrupt edac support")

(Nov 2013).

 [ bp: make it depend on EDAC=y so that the EDAC core doesn't get built
   as a module. ]

Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Acked-by: Johannes Thumshirn &lt;jth@kernel.org&gt;
Cc: James Morse &lt;james.morse@arm.com&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: linuxppc-dev@ozlabs.org
Cc: morbidrsa@gmail.com
Link: https://lkml.kernel.org/r/20190502141941.12927-1-mpe@ellerman.id.au
</content>
</entry>
<entry>
<title>EDAC/altera: Add separate SDRAM EDAC config</title>
<updated>2019-02-26T15:18:57Z</updated>
<author>
<name>Thor Thayer</name>
</author>
<published>2019-02-25T18:56:45Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=580b5cf50ca8f4781961382d54959683341b3126'/>
<id>urn:sha1:580b5cf50ca8f4781961382d54959683341b3126</id>
<content type='text'>
The CONFIG_ALTERA_EDAC Kconfig symbol always enables the SDRAM EDAC
functionality. On the newer architectures, however, there are cases
where the peripheral EDAC functionality is enabled but SDRAM needs to be
disabled.

Move SDRAM functions so they can be contained inside the conditional
CONFIG. Create new CONFIG option just for SDRAM.

 [ bp: Massage commit message. ]

Signed-off-by: Thor Thayer &lt;thor.thayer@linux.intel.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: James Morse &lt;james.morse@arm.com&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: dinguyen@kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: linux@armlinux.org.uk
Link: https://lkml.kernel.org/r/1551121006-4657-2-git-send-email-thor.thayer@linux.intel.com
</content>
</entry>
<entry>
<title>EDAC, i10nm: Fix randconfig builds</title>
<updated>2019-02-06T09:40:58Z</updated>
<author>
<name>Tony Luck</name>
</author>
<published>2019-02-05T18:02:00Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d6a9f7336d925364daca00557afa59a68e78b422'/>
<id>urn:sha1:d6a9f7336d925364daca00557afa59a68e78b422</id>
<content type='text'>
I10NM_EDAC depends on CONFIG_ACPI so make that dependency explicit.

Reported-by: Borislav Petkov &lt;bp@suse.de&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: Aristeu Rozanski &lt;aris@redhat.com&gt;
Cc: James Morse &lt;james.morse@arm.com&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Link: https://lkml.kernel.org/r/20190205180200.26865-1-tony.luck@intel.com
</content>
</entry>
<entry>
<title>EDAC, i10nm: Add a driver for Intel 10nm server processors</title>
<updated>2019-02-02T12:33:18Z</updated>
<author>
<name>Qiuxu Zhuo</name>
</author>
<published>2019-01-30T19:15:19Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d4dc89d069aab9074e2493a4c2f3969a0a0b91c1'/>
<id>urn:sha1:d4dc89d069aab9074e2493a4c2f3969a0a0b91c1</id>
<content type='text'>
This driver supports the Intel 10nm series server integrated memory
controller. It gets the memory capacity and topology information by
reading the registers in PCI configuration space and memory-mapped I/O.

It decodes the memory error address to the platform specific address
by using the ACPI Address Translation (ADXL) Device Specific Method
(DSM).

Co-developed-by: Tony Luck &lt;tony.luck@intel.com&gt;
Signed-off-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: James Morse &lt;james.morse@arm.com&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Link: https://lkml.kernel.org/r/20190130191519.15393-5-tony.luck@intel.com
</content>
</entry>
<entry>
<title>EDAC, aspeed: Add an Aspeed AST2500 EDAC driver</title>
<updated>2019-01-18T14:23:11Z</updated>
<author>
<name>Stefan M Schaeckeler</name>
</author>
<published>2019-01-17T16:38:16Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=9b7e6242ee4efcd7f9ef699bf1965e3a5343f216'/>
<id>urn:sha1:9b7e6242ee4efcd7f9ef699bf1965e3a5343f216</id>
<content type='text'>
Add support for the Aspeed AST2500 SoC.

Signed-off-by: Stefan M Schaeckeler &lt;sschaeck@cisco.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Cc: Joel Stanley &lt;joel@jms.id.au&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: Rob Herring &lt;robh+dt@kernel.org&gt;
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-aspeed@lists.ozlabs.org
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Link: https://lkml.kernel.org/r/1547743097-5236-2-git-send-email-schaecsn@gmx.net
</content>
</entry>
<entry>
<title>EDAC, skx: Fix randconfig builds in a better way</title>
<updated>2018-11-07T21:58:29Z</updated>
<author>
<name>Luck, Tony</name>
</author>
<published>2018-11-06T18:39:15Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=24c9d423e86b17b25b4b510e81f10aa232fdaa60'/>
<id>urn:sha1:24c9d423e86b17b25b4b510e81f10aa232fdaa60</id>
<content type='text'>
It was previously noted that Kconfig complained about unmet dependencies
when trying to configure skx_edac together with CONFIG_ACPI=n. First fix
for this checked for ACPI when doing

  select ACPI_ADXL

but this required stub functions for the case where ACPI wasn't
selected. It also allowed building a driver that didn't actually work
for a system that has non-volatile DIMMs.

Arnd Bergmann pointed out that the right fix is to make EDAC_SKX
"depend on ACPI".

Fixes: a324e9396ca3 ("EDAC, skx: Fix randconfig builds")
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
CC: "Rafael J. Wysocki" &lt;rafael.j.wysocki@intel.com&gt;
CC: Arnd Bergmann &lt;arnd@arndb.de&gt;
CC: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
CC: linux-edac &lt;linux-edac@vger.kernel.org&gt;
CC: qiuxu.zhuo@intel.com
Link: http://lkml.kernel.org/r/20181106183914.GA26731@agluck-desk
</content>
</entry>
</feed>
