<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/crypto/hisilicon, branch linux-5.14.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.14.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.14.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2021-09-15T08:02:05Z</updated>
<entry>
<title>crypto: hisilicon/sec - modify the hardware endian configuration</title>
<updated>2021-09-15T08:02:05Z</updated>
<author>
<name>Kai Ye</name>
</author>
<published>2021-08-13T07:41:02Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=16f6b6a202cd7cc285005e89b1aeba32e72722d3'/>
<id>urn:sha1:16f6b6a202cd7cc285005e89b1aeba32e72722d3</id>
<content type='text'>
[ Upstream commit a52626106d6f7edf3d106c065e13a0313cfeb82f ]

When the endian configuration of the hardware is abnormal, it will
cause the SEC engine is faulty that reports empty message. And it
will affect the normal function of the hardware. Currently the soft
configuration method can't restore the faulty device. The endian
needs to be configured according to the system properties. So fix it.

Signed-off-by: Kai Ye &lt;yekai13@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/sec - fix the abnormal exiting process</title>
<updated>2021-09-15T08:02:05Z</updated>
<author>
<name>Kai Ye</name>
</author>
<published>2021-08-13T07:41:01Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=df099323d1cef189f24516168a6b3c60d0cf9633'/>
<id>urn:sha1:df099323d1cef189f24516168a6b3c60d0cf9633</id>
<content type='text'>
[ Upstream commit 90367a027a22c3a9ca8b8bac15df34d9e859fc11 ]

Because the algs registration process has added a judgment.
So need to add the judgment for the abnormal exiting process.

Signed-off-by: Kai Ye &lt;yekai13@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/sec - fix the process of disabling sva prefetching</title>
<updated>2021-06-28T03:28:09Z</updated>
<author>
<name>Kai Ye</name>
</author>
<published>2021-06-26T02:50:33Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=66192b2e3fd8ab97ed518d6c0240e26655a20b4b'/>
<id>urn:sha1:66192b2e3fd8ab97ed518d6c0240e26655a20b4b</id>
<content type='text'>
The open interface of the sva prefetching function is distinguish the chip
version. But the close interface of the sva prefetching function doesn't
distinguish the chip version. As a result, the sva prefetching close
operation is also performed on Kunpeng920, those registers are important
on Kunpeng920, which eventually leads to abnormal hardware problems. So
need to fix it immediately.

Signed-off-by: Kai Ye &lt;yekai13@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/qm - implement for querying hardware tasks status.</title>
<updated>2021-06-24T06:51:36Z</updated>
<author>
<name>Wenkai Lin</name>
</author>
<published>2021-06-18T09:36:06Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d18344c0d095df544bd7174b8fae2cba523dd4a4'/>
<id>urn:sha1:d18344c0d095df544bd7174b8fae2cba523dd4a4</id>
<content type='text'>
This patch adds a function hisi_qm_is_q_updated to
check if the task is ready in hardware queue when
user polls an UACCE queue.This prevents users from
repeatedly querying whether the accelerator has
completed tasks, which wastes CPU resources.

Signed-off-by: Wenkai Lin &lt;linwenkai6@hisilicon.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/sec - Fix spelling mistake "fallbcak" -&gt; "fallback"</title>
<updated>2021-06-24T06:51:34Z</updated>
<author>
<name>Colin Ian King</name>
</author>
<published>2021-06-15T10:11:53Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=84c2c729eabda52a2f6caa087d51f0d7420bca0c'/>
<id>urn:sha1:84c2c729eabda52a2f6caa087d51f0d7420bca0c</id>
<content type='text'>
There is a spelling mistake in a dev_err message. Fix it.

Signed-off-by: Colin Ian King &lt;colin.king@canonical.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/zip - adds the max shaper type rate</title>
<updated>2021-06-17T07:07:32Z</updated>
<author>
<name>Kai Ye</name>
</author>
<published>2021-06-11T09:06:50Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=38a9eb8182a24c7ef2dbe82ab46cafe8f8e9b271'/>
<id>urn:sha1:38a9eb8182a24c7ef2dbe82ab46cafe8f8e9b271</id>
<content type='text'>
The ZIP driver support configure each function's QoS in the Host
for Kunpeng930. The ZIP driver needs to configure the maximum shaper
type rate.

Signed-off-by: Kai Ye &lt;yekai13@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/hpre - adds the max shaper type rate</title>
<updated>2021-06-17T07:07:32Z</updated>
<author>
<name>Kai Ye</name>
</author>
<published>2021-06-11T09:06:49Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c02f5302e46a2505cb0a6170470759a7db929979'/>
<id>urn:sha1:c02f5302e46a2505cb0a6170470759a7db929979</id>
<content type='text'>
The HPRE driver support configure each function's QoS in the Host
for Kunpeng930. The HPRE driver needs to configure the maximum shaper
type rate.

Signed-off-by: Kai Ye &lt;yekai13@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/sec - adds the max shaper type rate</title>
<updated>2021-06-17T07:07:32Z</updated>
<author>
<name>Kai Ye</name>
</author>
<published>2021-06-11T09:06:48Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3d2a429271bb622da48983631625c20de3b5f1e5'/>
<id>urn:sha1:3d2a429271bb622da48983631625c20de3b5f1e5</id>
<content type='text'>
The SEC driver support configure each function's QoS in the Host
for Kunpeng930. The SEC driver needs to configure the maximum shaper
type rate.

Signed-off-by: Kai Ye &lt;yekai13@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/qm - supports to inquiry each function's QoS</title>
<updated>2021-06-17T07:07:32Z</updated>
<author>
<name>Kai Ye</name>
</author>
<published>2021-06-11T09:06:47Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3bbf0783636be8fd672907df25904288f14566f2'/>
<id>urn:sha1:3bbf0783636be8fd672907df25904288f14566f2</id>
<content type='text'>
1. The ACC driver supports to inquiry each function's QoS in the Host
and VM. The driver supports reading QoS by the device debug SysFS
attribute file "alg_qos", like "cat alg_qos".
2. Modify the communication process between pf and vf as needed.

Signed-off-by: Kai Ye &lt;yekai13@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/qm - add pf ping single vf function</title>
<updated>2021-06-17T07:07:31Z</updated>
<author>
<name>Kai Ye</name>
</author>
<published>2021-06-11T09:06:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2966d9d3078c623f48054ef1bfe9a975e5d1fe0c'/>
<id>urn:sha1:2966d9d3078c623f48054ef1bfe9a975e5d1fe0c</id>
<content type='text'>
According to the function communication, add pf ping single
vf function to be used in the vf read QoS.

Signed-off-by: Kai Ye &lt;yekai13@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
</feed>
