<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/crypto/ccp/ccp-dev-v5.c, branch linux-5.3.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.3.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.3.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2019-06-19T15:09:55Z</updated>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500</title>
<updated>2019-06-19T15:09:55Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2019-06-04T08:11:33Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d2912cb15bdda8ba4a5dd73396ad62641af2f520'/>
<id>urn:sha1:d2912cb15bdda8ba4a5dd73396ad62641af2f520</id>
<content type='text'>
Based on 2 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 as
  published by the free software foundation #

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 4122 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Enrico Weigelt &lt;info@metux.net&gt;
Reviewed-by: Kate Stewart &lt;kstewart@linuxfoundation.org&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>cross-tree: phase out dma_zalloc_coherent()</title>
<updated>2019-01-08T12:58:37Z</updated>
<author>
<name>Luis Chamberlain</name>
</author>
<published>2019-01-04T08:23:09Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=750afb08ca71310fcf0c4e2cb1565c63b8235b60'/>
<id>urn:sha1:750afb08ca71310fcf0c4e2cb1565c63b8235b60</id>
<content type='text'>
We already need to zero out memory for dma_alloc_coherent(), as such
using dma_zalloc_coherent() is superflous. Phase it out.

This change was generated with the following Coccinelle SmPL patch:

@ replace_dma_zalloc_coherent @
expression dev, size, data, handle, flags;
@@

-dma_zalloc_coherent(dev, size, handle, flags)
+dma_alloc_coherent(dev, size, handle, flags)

Suggested-by: Christoph Hellwig &lt;hch@lst.de&gt;
Signed-off-by: Luis Chamberlain &lt;mcgrof@kernel.org&gt;
[hch: re-ran the script on the latest tree]
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
</content>
</entry>
<entry>
<title>crypto: ccp - remove unused variable qim</title>
<updated>2017-11-03T13:53:30Z</updated>
<author>
<name>Colin Ian King</name>
</author>
<published>2017-10-12T16:55:41Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=745952aeb599634025b568e1695fc6793b771682'/>
<id>urn:sha1:745952aeb599634025b568e1695fc6793b771682</id>
<content type='text'>
Variable qim is assigned but never read, it is redundant and can
be removed.

Cleans up clang warning: Value stored to 'qim' is never read

Fixes: 4b394a232df7 ("crypto: ccp - Let a v5 CCP provide the same function as v3")
Signed-off-by: Colin Ian King &lt;colin.king@canonical.com&gt;
Acked-by: Gary R Hook &lt;gary.hook@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: ccp - Fix XTS-AES-128 support on v5 CCPs</title>
<updated>2017-08-04T01:27:41Z</updated>
<author>
<name>Gary R Hook</name>
</author>
<published>2017-07-25T19:12:11Z</published>
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<id>urn:sha1:e652399edba99a5497f0d80f240c9075d3b43493</id>
<content type='text'>
Version 5 CCPs have some new requirements for XTS-AES: the type field
must be specified, and the key requires 512 bits, with each part
occupying 256 bits and padded with zeroes.

cc: &lt;stable@vger.kernel.org&gt; # 4.9.x+

Signed-off-by: Gary R Hook &lt;ghook@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>csrypto: ccp - Expand RSA support for a v5 ccp</title>
<updated>2017-07-28T09:58:06Z</updated>
<author>
<name>Gary R Hook</name>
</author>
<published>2017-07-17T20:16:42Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e28c190db66830c04b403b7eba7f8a5b53c22ffc'/>
<id>urn:sha1:e28c190db66830c04b403b7eba7f8a5b53c22ffc</id>
<content type='text'>
A version 5 CCP can handle an RSA modulus up to 16k bits.

Signed-off-by: Gary R Hook &lt;gary.hook@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: ccp - Fix base RSA function for version 5 CCPs</title>
<updated>2017-07-28T09:58:02Z</updated>
<author>
<name>Gary R Hook</name>
</author>
<published>2017-07-17T20:16:13Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6ba46c7d4d7e2b4f38c9d9891dee4ba1f5338f31'/>
<id>urn:sha1:6ba46c7d4d7e2b4f38c9d9891dee4ba1f5338f31</id>
<content type='text'>
Version 5 devices have requirements for buffer lengths, as well as
parameter format (e.g. bits vs. bytes). Fix the base CCP driver
code to meet requirements all supported versions.

Signed-off-by: Gary R Hook &lt;gary.hook@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: ccp - Update copyright dates for 2017.</title>
<updated>2017-07-28T09:58:01Z</updated>
<author>
<name>Gary R Hook</name>
</author>
<published>2017-07-17T20:00:49Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=68cc652f83b9a4f79471db6c79ae0bfe5175eda3'/>
<id>urn:sha1:68cc652f83b9a4f79471db6c79ae0bfe5175eda3</id>
<content type='text'>
Some updates this year have not had copyright dates changed in modified
files. Correct this for 2017.

Signed-off-by: Gary R Hook &lt;gary.hook@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: ccp - Abstract interrupt registeration</title>
<updated>2017-07-18T09:57:14Z</updated>
<author>
<name>Brijesh Singh</name>
</author>
<published>2017-07-06T14:59:15Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f4d18d656f882a7ca558313d5f1b18b1fd01f759'/>
<id>urn:sha1:f4d18d656f882a7ca558313d5f1b18b1fd01f759</id>
<content type='text'>
The CCP and PSP devices part of AMD Secure Procesor may share the same
interrupt. Hence we expand the SP device to register a common interrupt
handler and provide functions to CCP and PSP devices to register their
interrupt callback which will be invoked upon interrupt.

Signed-off-by: Brijesh Singh &lt;brijesh.singh@amd.com&gt;
Acked-by: Gary R Hook &lt;gary.hook@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: ccp - Introduce the AMD Secure Processor device</title>
<updated>2017-07-18T09:51:19Z</updated>
<author>
<name>Brijesh Singh</name>
</author>
<published>2017-07-06T14:59:14Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=720419f01832f7e697cb80480b97b2a1e96045cd'/>
<id>urn:sha1:720419f01832f7e697cb80480b97b2a1e96045cd</id>
<content type='text'>
The CCP device is part of the AMD Secure Processor. In order to expand
the usage of the AMD Secure Processor, create a framework that allows
functional components of the AMD Secure Processor to be initialized and
handled appropriately.

Signed-off-by: Brijesh Singh &lt;brijesh.singh@amd.com&gt;
Acked-by: Gary R Hook &lt;gary.hook@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: ccp - Add debugfs entries for CCP information</title>
<updated>2017-06-19T06:11:47Z</updated>
<author>
<name>Gary R Hook</name>
</author>
<published>2017-05-02T22:33:40Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3cdbe346ed3f380eae1cb3e9febfe703e7d8a7b0'/>
<id>urn:sha1:3cdbe346ed3f380eae1cb3e9febfe703e7d8a7b0</id>
<content type='text'>
Expose some data about the configuration and operation of the CCP
through debugfs entries: device name, capabilities, configuration,
statistics.

Allow the user to reset the counters to zero by writing (any value)
to the 'stats' file. This can be done per queue or per device.

Changes from V1:
 - Correct polarity of test when destroying devices at module unload

Signed-off-by: Gary R Hook &lt;gary.hook@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
</feed>
