<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/crypto/caam/caamalg.c, branch linux-4.8.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.8.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.8.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2017-01-06T10:16:21Z</updated>
<entry>
<title>crypto: caam - fix AEAD givenc descriptors</title>
<updated>2017-01-06T10:16:21Z</updated>
<author>
<name>Alex Porosanu</name>
</author>
<published>2016-11-09T08:46:11Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8022387d236a7586726ca1bccc97d0447f8b020d'/>
<id>urn:sha1:8022387d236a7586726ca1bccc97d0447f8b020d</id>
<content type='text'>
commit d128af17876d79b87edf048303f98b35f6a53dbc upstream.

The AEAD givenc descriptor relies on moving the IV through the
output FIFO and then back to the CTX2 for authentication. The
SEQ FIFO STORE could be scheduled before the data can be
read from OFIFO, especially since the SEQ FIFO LOAD needs
to wait for the SEQ FIFO LOAD SKIP to finish first. The
SKIP takes more time when the input is SG than when it's
a contiguous buffer. If the SEQ FIFO LOAD is not scheduled
before the STORE, the DECO will hang waiting for data
to be available in the OFIFO so it can be transferred to C2.
In order to overcome this, first force transfer of IV to C2
by starting the "cryptlen" transfer first and then starting to
store data from OFIFO to the output buffer.

Fixes: 1acebad3d8db8 ("crypto: caam - faster aead implementation")
Signed-off-by: Alex Porosanu &lt;alexandru.porosanu@nxp.com&gt;
Signed-off-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>crypto: caam - do not register AES-XTS mode on LP units</title>
<updated>2016-11-26T08:56:55Z</updated>
<author>
<name>Sven Ebenfeld</name>
</author>
<published>2016-11-07T17:51:34Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=fc312878ffe36d76c265ac0588393f823b65033e'/>
<id>urn:sha1:fc312878ffe36d76c265ac0588393f823b65033e</id>
<content type='text'>
commit 83d2c9a9c17b1e9f23a3a0c24c03cd18e4b02520 upstream.

When using AES-XTS on a Wandboard, we receive a Mode error:
caam_jr 2102000.jr1: 20001311: CCB: desc idx 19: AES: Mode error.

According to the Security Reference Manual, the Low Power AES units
of the i.MX6 do not support the XTS mode. Therefore we must not
register XTS implementations in the Crypto API.

Signed-off-by: Sven Ebenfeld &lt;sven.ebenfeld@gmail.com&gt;
Reviewed-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

Fixes: c6415a6016bf "crypto: caam - add support for acipher xts(aes)"
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;

</content>
</entry>
<entry>
<title>crypto: caam - fix IV loading for authenc (giv)decryption</title>
<updated>2016-08-31T14:50:42Z</updated>
<author>
<name>Horia Geantă</name>
</author>
<published>2016-08-29T11:52:14Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8b18e2359aff2ab810aba84cebffc9da07fef78f'/>
<id>urn:sha1:8b18e2359aff2ab810aba84cebffc9da07fef78f</id>
<content type='text'>
For algorithms that implement IV generators before the crypto ops,
the IV needed for decryption is initially located in req-&gt;src
scatterlist, not in req-&gt;iv.

Avoid copying the IV into req-&gt;iv by modifying the (givdecrypt)
descriptors to load it directly from req-&gt;src.
aead_givdecrypt() is no longer needed and goes away.

Cc: &lt;stable@vger.kernel.org&gt; # 4.3+
Fixes: 479bcc7c5b9e ("crypto: caam - Convert authenc to new AEAD interface")
Signed-off-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - defer aead_set_sh_desc in case of zero authsize</title>
<updated>2016-08-08T15:43:53Z</updated>
<author>
<name>Horia Geantă</name>
</author>
<published>2016-08-04T17:02:47Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2fdea258fde036a87d3396ec9c0ef66f10768530'/>
<id>urn:sha1:2fdea258fde036a87d3396ec9c0ef66f10768530</id>
<content type='text'>
To be able to generate shared descriptors for AEAD, the authentication size
needs to be known. However, there is no imposed order of calling .setkey,
.setauthsize callbacks.

Thus, in case authentication size is not known at .setkey time, defer it
until .setauthsize is called.

The authsize != 0 check was incorrectly removed when converting the driver
to the new AEAD interface.

Cc: &lt;stable@vger.kernel.org&gt; # 4.3+
Fixes: 479bcc7c5b9e ("crypto: caam - Convert authenc to new AEAD interface")
Signed-off-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - fix echainiv(authenc) encrypt shared descriptor</title>
<updated>2016-08-08T15:43:49Z</updated>
<author>
<name>Horia Geantă</name>
</author>
<published>2016-08-04T17:02:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1d2d87e81ea21f64c19b95ef228b865a6880e17e'/>
<id>urn:sha1:1d2d87e81ea21f64c19b95ef228b865a6880e17e</id>
<content type='text'>
There are a few things missed by the conversion to the
new AEAD interface:

1 - echainiv(authenc) encrypt shared descriptor

The shared descriptor is incorrect: due to the order of operations,
at some point in time MATH3 register is being overwritten.

2 - buffer used for echainiv(authenc) encrypt shared descriptor

Encrypt and givencrypt shared descriptors (for AEAD ops) are mutually
exclusive and thus use the same buffer in context state: sh_desc_enc.

However, there's one place missed by s/sh_desc_givenc/sh_desc_enc,
leading to errors when echainiv(authenc(...)) algorithms are used:
DECO: desc idx 14: Header Error. Invalid length or parity, or
certain other problems.

While here, also fix a typo: dma_mapping_error() is checking
for validity of sh_desc_givenc_dma instead of sh_desc_enc_dma.

Cc: &lt;stable@vger.kernel.org&gt; # 4.3+
Fixes: 479bcc7c5b9e ("crypto: caam - Convert authenc to new AEAD interface")
Signed-off-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - add support for acipher xts(aes)</title>
<updated>2015-10-08T13:42:20Z</updated>
<author>
<name>Catalin Vasile</name>
</author>
<published>2015-10-02T10:13:18Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c6415a6016bff0b547c13cadb1d5e50e9ace2be3'/>
<id>urn:sha1:c6415a6016bff0b547c13cadb1d5e50e9ace2be3</id>
<content type='text'>
Add support for AES working in XEX-based Tweaked-codebook mode with
ciphertext Stealing (XTS)

sector index - HW limitation: CAAM device supports sector index of only
8 bytes to be used for sector index inside IV, instead of whole 16 bytes
received on request. This represents 2 ^ 64 = 16,777,216 Tera of possible
values for sector index.

Signed-off-by: Cristian Hristea &lt;cristi.hristea@gmail.com&gt;
Signed-off-by: Horia Geanta &lt;horia.geanta@freescale.com&gt;
Signed-off-by: Alex Porosanu &lt;alexandru.porosanu@freescale.com&gt;
Signed-off-by: Catalin Vasile &lt;catalin.vasile@freescale.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - dma_map_sg can handle chained SG</title>
<updated>2015-10-01T13:56:56Z</updated>
<author>
<name>LABBE Corentin</name>
</author>
<published>2015-09-23T11:55:27Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=13fb8fd7a81923f7a64b4e688fe0bdaf1ea26adf'/>
<id>urn:sha1:13fb8fd7a81923f7a64b4e688fe0bdaf1ea26adf</id>
<content type='text'>
The caam driver use two dma_map_sg path according to SG are chained
or not.
Since dma_map_sg can handle both case, clean the code with all
references to sg chained.

Thus removing dma_map_sg_chained, dma_unmap_sg_chained
and __sg_count functions.

Signed-off-by: LABBE Corentin &lt;clabbe.montjoie@gmail.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - Use the preferred style for memory allocations</title>
<updated>2015-08-24T14:07:42Z</updated>
<author>
<name>Fabio Estevam</name>
</author>
<published>2015-08-21T16:52:00Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=9c4f9733e26f0d6977096fcafe71ea2ba9f0cd7c'/>
<id>urn:sha1:9c4f9733e26f0d6977096fcafe71ea2ba9f0cd7c</id>
<content type='text'>
"The preferred form for passing a size of a struct is the following:

        p = kmalloc(sizeof(*p), ...);
....

The preferred form for allocating a zeroed array is the following:

        p = kcalloc(n, sizeof(...), ...); "

,so do as suggested.

Signed-off-by: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Reviewed-by: Horia Geant? &lt;horia.geanta@freescale.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: aead - Remove CRYPTO_ALG_AEAD_NEW flag</title>
<updated>2015-08-17T08:53:53Z</updated>
<author>
<name>Herbert Xu</name>
</author>
<published>2015-08-13T09:29:06Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5e4b8c1fcc70016f43926203ae1820c3b380d5cd'/>
<id>urn:sha1:5e4b8c1fcc70016f43926203ae1820c3b380d5cd</id>
<content type='text'>
This patch removes the CRYPTO_ALG_AEAD_NEW flag now that everyone
has been converted.

Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - Detect hardware features during algorithm registration</title>
<updated>2015-08-10T15:19:04Z</updated>
<author>
<name>Victoria Milhoan</name>
</author>
<published>2015-08-05T18:28:48Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=bf83490ee4207de3af59b63870eb9f72f1e523f1'/>
<id>urn:sha1:bf83490ee4207de3af59b63870eb9f72f1e523f1</id>
<content type='text'>
Register only algorithms supported by CAAM hardware, using the CHA
version and instantiation registers to identify hardware capabilities.

Signed-off-by: Victoria Milhoan &lt;vicki.milhoan@freescale.com&gt;
Tested-by: Horia Geantă &lt;horia.geanta@freescale.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
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