<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/crypto/caam/Kconfig, branch linux-4.9.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.9.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.9.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2016-07-05T15:05:24Z</updated>
<entry>
<title>crypto: caam - add support for RSA algorithm</title>
<updated>2016-07-05T15:05:24Z</updated>
<author>
<name>Tudor Ambarus</name>
</author>
<published>2016-07-04T10:12:08Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8c419778ab57e497b5de1352aa39dbe2efb3ed54'/>
<id>urn:sha1:8c419778ab57e497b5de1352aa39dbe2efb3ed54</id>
<content type='text'>
Add RSA support to caam driver.

Initial author is Yashpal Dutta &lt;yashpal.dutta@freescale.com&gt;.

Signed-off-by: Tudor Ambarus &lt;tudor-dan.ambarus@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - add ARCH_LAYERSCAPE to supported architectures</title>
<updated>2016-05-31T08:41:54Z</updated>
<author>
<name>Horia Geantă</name>
</author>
<published>2016-05-19T15:11:33Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=9e217795e08a0b0f06afd121401180d756eb1b54'/>
<id>urn:sha1:9e217795e08a0b0f06afd121401180d756eb1b54</id>
<content type='text'>
This basically adds support for ls1043a platform.

Signed-off-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - handle core endianness != caam endianness</title>
<updated>2016-05-31T08:41:54Z</updated>
<author>
<name>Horia Geantă</name>
</author>
<published>2016-05-19T15:11:26Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=261ea058f016bc04fa064348ad9bf39d94379381'/>
<id>urn:sha1:261ea058f016bc04fa064348ad9bf39d94379381</id>
<content type='text'>
There are SoCs like LS1043A where CAAM endianness (BE) does not match
the default endianness of the core (LE).
Moreover, there are requirements for the driver to handle cases like
CPU_BIG_ENDIAN=y on ARM-based SoCs.
This requires for a complete rewrite of the I/O accessors.

PPC-specific accessors - {in,out}_{le,be}XX - are replaced with
generic ones - io{read,write}[be]XX.

Endianness is detected dynamically (at runtime) to allow for
multiplatform kernels, for e.g. running the same kernel image
on LS1043A (BE CAAM) and LS2080A (LE CAAM) armv8-based SoCs.

While here: debugfs entries need to take into consideration the
endianness of the core when displaying data. Add the necessary
glue code so the entries remain the same, but they are properly
read, regardless of the core and/or SEC endianness.

Note: pdb.h fixes only what is currently being used (IPsec).

Reviewed-by: Tudor Ambarus &lt;tudor-dan.ambarus@nxp.com&gt;
Signed-off-by: Horia Geantă &lt;horia.geanta@nxp.com&gt;
Signed-off-by: Alex Porosanu &lt;alexandru.porosanu@nxp.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - add support for LS1021A</title>
<updated>2015-08-18T02:30:39Z</updated>
<author>
<name>Horia Geant?</name>
</author>
<published>2015-08-17T12:24:10Z</published>
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<id>urn:sha1:6c3af955935223217f23ef0ae672d3842418ec50</id>
<content type='text'>
LS1021A is a QorIQ SoC having little endian CAAM.

There are a few differences b/w QorIQ and i.MX from CAAM perspective:

1. i.MX platforms are somewhat special wrt. 64-bit registers:
-big endian format at 64-bit level: MSW at address+0 and LSW at address+4
-little endian format at 32-bit level (within MSW and LSW)
and thus need special handling.

2. No CCM (clock controller module) for QorIQ.
No CAAM clocks to enable / disable.

A new Kconfig option - CRYPTO_DEV_FSL_CAAM_LE - is added to indicate
CAAM is little endian (*). It is hidden from the user (to avoid
misconfiguration); when adding support for a new platform with LE CAAM,
either the Kconfig needs to be updated or the corresponding defconfig
needs to indicate that CAAM is LE.
(*) Using a DT property to provide CAAM endianness would not allow
for the ifdeffery.

In order to keep changes to a minimum, the following changes
are postponed:
-endianness fix of the last word in the S/G (rsvd2, bpid, offset),
fields are always 0 anyway;
-S/G format fix for i.MX7 (yes, i.MX7 support was not added yet,
but still...)

Signed-off-by: Horia Geant? &lt;horia.geanta@freescale.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - Enable MXC devices to select CAAM driver in Kconfig</title>
<updated>2015-08-10T15:19:03Z</updated>
<author>
<name>Steve Cornelius</name>
</author>
<published>2015-08-05T18:28:46Z</published>
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<id>urn:sha1:350cdfeba888c21341ad2989c5930a2708def579</id>
<content type='text'>
Allow CAAM to be selected in the kernel for Freescale i.MX devices if
ARCH_MXC is enabled.

Signed-off-by: Steve Cornelius &lt;steve.cornelius@freescale.com&gt;
Signed-off-by: Victoria Milhoan &lt;vicki.milhoan@freescale.com&gt;
Tested-by: Horia Geantă &lt;horia.geanta@freescale.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: drivers - Fix Kconfig selects</title>
<updated>2015-06-18T06:45:36Z</updated>
<author>
<name>Herbert Xu</name>
</author>
<published>2015-06-17T06:58:24Z</published>
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<id>urn:sha1:596103cf8fb0a258e1a5ed3e895860764490934d</id>
<content type='text'>
This patch fixes a number of problems in crypto driver Kconfig
entries:

1. Select BLKCIPHER instead of BLKCIPHER2.  The latter is internal
and should not be used outside of the crypto API itself.
2. Do not select ALGAPI unless you use a legacy type like
CRYPTO_ALG_TYPE_CIPHER.
3. Select the algorithm type that you are implementing, e.g., AEAD.
4. Do not select generic C code such as CBC/ECB unless you use them
as a fallback.
5. Remove default n since that is the default default.

Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - Add Platform driver for Job Ring</title>
<updated>2013-10-30T04:02:57Z</updated>
<author>
<name>Ruchika Gupta</name>
</author>
<published>2013-10-25T06:31:01Z</published>
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<id>urn:sha1:313ea293e9c4d1eabcaddd2c0800f083b03c2a2e</id>
<content type='text'>
The SEC Job Rings are now available as individual devices.
This would enable sharing of job rings between kernel and
user space. Job Rings can now be dynamically bound/unbound
from kernel.

Changes are made in the following layers of CAAM Driver
1. Controller driver
        - Does basic initialization of CAAM Block.
        - Creates platform devices for Job Rings.
(Earlier the initialization of Job ring  was done
 by the controller driver)

2. JobRing Platform driver
        - Manages the platform Job Ring devices created
          by the controller driver

Signed-off-by: Ruchika Gupta &lt;ruchika.gupta@freescale.com&gt;
Reviewed-by: Garg Vakul-B16394 &lt;vakul@freescale.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - add option for enabling DEBUG mode</title>
<updated>2013-08-21T11:08:37Z</updated>
<author>
<name>Alex Porosanu</name>
</author>
<published>2013-08-14T15:56:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d4d8edf88544e4df694d32594c3dde63f82be960'/>
<id>urn:sha1:d4d8edf88544e4df694d32594c3dde63f82be960</id>
<content type='text'>
This patch adds an option to the Kconfig file for
SEC which enables the user to see the debug messages
that are printed inside the SEC driver.

Signed-off-by: Alex Porosanu &lt;alexandru.porosanu@freescale.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - fix typo "CRYPTO_AHASH"</title>
<updated>2013-03-10T10:16:36Z</updated>
<author>
<name>Paul Bolle</name>
</author>
<published>2013-03-05T13:33:16Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ae8488a507357fd4fd2c825ac423b39ea1041353'/>
<id>urn:sha1:ae8488a507357fd4fd2c825ac423b39ea1041353</id>
<content type='text'>
The Kconfig entry for CAAM's hash algorithm implementations has always
selected CRYPTO_AHASH. But there's no corresponding Kconfig symbol.

It seems it was intended to select CRYPTO_HASH, like other crypto
drivers do. That would apparently (indirectly) select CRYPTO_HASH2,
which would enable the ahash functionality this driver uses.

Signed-off-by: Paul Bolle &lt;pebolle@tiscali.nl&gt;
Reviewed-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: caam - disable IRQ coalescing by default</title>
<updated>2012-06-27T06:42:06Z</updated>
<author>
<name>Kim Phillips</name>
</author>
<published>2012-06-23T00:48:53Z</published>
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<id>urn:sha1:1a076689cda8a1d623dcda170b2dc2b476cc6f1a</id>
<content type='text'>
It has been observed that in zero-loss benchmarks, when a
slow traffic rate is being tested, the IRQ timer coalescing
parameter was set too high, and the ethernet controller
would start dropping packets because the job ring back half
wouldn't be executed in time before the ethernet controller
would fill its buffers, thereby significantly reducing the
zero-loss performance figures.

Empirical testing has shown that the best zero-loss performance
is achieved when IRQ coalescing is set to minimum values and/or
turned off, since apparently the job ring driver already implements
an adequately-performing general-purpose IRQ mitigation strategy
in software.

Whilst we could go with minimal count (2-8) and timing settings
(192-256), we prefer just turning h/w coalescing altogether off
to minimize setkey latency (due to split key generation), and
for consistent cross-SoC performance (the SEC vs. core clock
ratio changes).

Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
</feed>
