kernel.git/drivers/clk/ti, branch linux-4.16.y

clk: ti: fix flag space conflict with clkctrl clocks

2018-05-16T08:12:25Z

commit 269bd202bc0fd04e841cb123867fd3f49e04ace9 upstream. The introduction of support for CLK_SET_RATE_PARENT flag for clkctrl clocks used a generic clock flag, which causes a conflict with the rest of the clkctrl flags, namely the NO_IDLEST flag. This can cause boot failures on certain platforms where this flag is introduced, by omitting the wait for the clockctrl module to be fully enabled before proceeding with rest of the code. Fix this by moving all the clkctrl specific flags to their own bit-range. Signed-off-by: Tero Kristo Fixes: 49159a9dc3da ("clk: ti: add support for CLK_SET_RATE_PARENT flag") Reported-by: Christophe Lyon Tested-by: Tony Lindgren Cc: Sam Protsenko Signed-off-by: Greg Kroah-Hartman

clk: ti: am43xx: add set-rate-parent support for display clkctrl clock

2018-03-08T10:14:44Z

Display driver assumes it can use clk_set_rate for the display clock via set-rate-parent mechanism, so add the flag for this to id. Signed-off-by: Tero Kristo Acked-by: Tony Lindgren

clk: ti: am33xx: add set-rate-parent support for display clkctrl clock

2018-03-08T10:14:43Z

Display driver assumes it can use clk_set_rate for the display clock via set-rate-parent mechanism, so add the flag for this to it. Signed-off-by: Tero Kristo Reported-by: Jyri Sarha Acked-by: Tony Lindgren Tested-by: Jyri Sarha

clk: ti: clkctrl: add support for CLK_SET_RATE_PARENT flag

2018-03-08T10:14:43Z

Certain clkctrl clocks, notably the display ones, use the CLK_SET_RATE_PARENT feature extensively. Add support for this flag to the clkctrl clocks. Signed-off-by: Tero Kristo Reported-by: Jyri Sarha Acked-by: Tony Lindgren Tested-by: Jyri Sarha

Merge branches 'clk-qcom-alpha-pll', 'clk-check-ops-ptr', 'clk-protect-rate' and 'clk-omap' into clk-next

2018-01-27T00:41:39Z

* clk-qcom-alpha-pll: clk: qcom: add read-only alpha pll post divider operations clk: qcom: support for 2 bit PLL post divider clk: qcom: support Brammo type Alpha PLL clk: qcom: support Huayra type Alpha PLL clk: qcom: support for dynamic updating the PLL clk: qcom: support for alpha mode configuration clk: qcom: flag for 64 bit CONFIG_CTL clk: qcom: fix 16 bit alpha support calculation clk: qcom: support for alpha pll properties * clk-check-ops-ptr: clk: check ops pointer on clock register * clk-protect-rate: clk: fix set_rate_range when current rate is out of range clk: add clk_rate_exclusive api clk: cosmetic changes to clk_summary debugfs entry clk: add clock protection mechanism to clk core clk: use round rate to bail out early in set_rate clk: rework calls to round and determine rate callbacks clk: add clk_core_set_phase_nolock function clk: take the prepare lock out of clk_core_set_parent clk: fix incorrect usage of ENOSYS * clk-omap: clk: ti: Drop legacy clk-3xxx-legacy code

clk: ti: Drop legacy clk-3xxx-legacy code

2017-12-14T16:32:06Z

We have now had omap3 booting in device tree only mode for a while and all this code is unused. Acked-by: Tero Kristo Signed-off-by: Tony Lindgren

clk: ti: omap4: clkctrl data fixes for opt-clocks

2017-12-01T13:18:08Z

Re-route all opt-clocks to use the new clkctrl clocks also, instead of depending on the old dt clocks. Also, add aliases for certain clkctrl clocks that hwmod core depends upon. The alias list can be stripped down once hwmod database no longer needs these. Signed-off-by: Tero Kristo

clk: ti: dm816: add clkctrl clock data

2017-12-01T13:18:06Z

Add data for dm816 clkctrl clocks, and register it within the clkctrl driver. Signed-off-by: Tero Kristo

clk: ti: dm814: add clkctrl clock data

2017-12-01T13:18:01Z

Add data for dm814 clkctrl clocks, and register it within the clkctrl driver. Signed-off-by: Tero Kristo

clk: ti: am43xx: add clkctrl clock data

2017-12-01T13:17:39Z

Add data for am43xx clkctrl clocks, and register it within the clkctrl driver. Signed-off-by: Tero Kristo Acked-by: Stephen Boyd