kernel.git/drivers/clk/socfpga, branch linux-4.5.y

clk: socfpga: Add a second parent option for the dbg_base_clk

2015-08-24T23:49:03Z

The debug base clock can be bypassed from the main PLL to the OSC1 clock. The bypass register is the staysoc1(0x10) register that is in the clock manager. This patch adds the option to get the correct parent for the debug base clock. Signed-off-by: Dinh Nguyen Signed-off-by: Stephen Boyd

clk: socfpga: switch to GENMASK()

2015-07-28T18:59:16Z

Convert the code to use GENMASK() helper instead of div_mask() macro. Signed-off-by: Andy Shevchenko Acked-by: Dinh Nguyen Signed-off-by: Stephen Boyd

clk: socfpga: Remove clk.h and clkdev.h includes

2015-07-20T18:11:14Z

Clock provider drivers generally shouldn't include clk.h because it's the consumer API. Remove the include here because this is a provider driver. The clkdev.h include isn't used either, remove it and add in slab.h to make sure things keep compiling. Acked-by: Dinh Nguyen Signed-off-by: Stephen Boyd

clk: socfpga: remove a stray tab

2015-06-10T01:14:27Z

This line was indented too far. Signed-off-by: Dan Carpenter Acked-by: Dinh Nguyen Signed-off-by: Michael Turquette

clk: socfpga: make use of of_clk_parent_fill helper function

2015-06-06T01:10:34Z

Use of_clk_parent_fill to fill in the parent clock's array. Signed-off-by: Dinh Nguyen Signed-off-by: Stephen Boyd

clk: socfpga: add a clock driver for the Arria 10 platform

2015-05-21T22:16:04Z

The clocks on the Arria 10 platform is a bit different than the Cyclone/Arria 5 platform that it should just have it's own driver. Signed-off-by: Dinh Nguyen Signed-off-by: Stephen Boyd

clk: socfpga: update clk.h so for Arria10 platform to use

2015-05-21T22:10:38Z

There are 5 possible parent clocks for the SoCFPGA Arria10. Move the define SYSMGR_SDMMC_CTRL_SET and streq() to clk.h so that the Arria clock driver can use. Signed-off-by: Dinh Nguyen Signed-off-by: Stephen Boyd

clk: socfpga: Silence sparse warning

2015-05-15T00:11:28Z

drivers/clk/socfpga/clk-periph.c:79:39: warning: Using plain integer as NULL pointer Cc: Dinh Nguyen Signed-off-by: Stephen Boyd

clk: socfpga: Silence sparse warning

2015-05-15T00:11:25Z

drivers/clk/socfpga/clk-gate.c:227:40: warning: Using plain integer as NULL pointer Cc: Dinh Nguyen Signed-off-by: Stephen Boyd

Merge tag 'socfpga-clk-update-for-v3.16' of git://git.rocketboards.org/linux-socfpga-next into clk-next-socfpga

2014-05-13T02:11:13Z

Adds support getting the divider registers for the MAIN PLL that was once thought to be hidden.