<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/drivers/clk/samsung, branch linux-4.5.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.5.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.5.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2016-01-21T02:16:29Z</updated>
<entry>
<title>Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2016-01-21T02:16:29Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2016-01-21T02:16:29Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6d1c244803f2c013fb9c31b0904c01f1830b73ab'/>
<id>urn:sha1:6d1c244803f2c013fb9c31b0904c01f1830b73ab</id>
<content type='text'>
Pull ARM DT updates from Olof Johansson:
 "As usual, the bulk of this release is again DT file contents.

  There's a huge number of changes here, and it's challenging to give a
  crisp overview of just what is in here.  To start with:

  New boards:

   - TI-based DM3730 from LogicPD (Torpedo)
   - Cosmic+ M4 (nommu) initial support (Freescale Vybrid)
   - Raspberry Pi 2 DT files
   - Watchdog on Meson8b
   - Veyron-mickey (ASUS Chromebit) DTS
   - Rockchip rk3228 SoC and eval board
   - Sigma Designs Tango4

  Improvements:

   - Improved support for Qualcomm APQ8084, including Sony Xperia Z DT files
   - Misc new devices for Rockchip rk3036 and rk3288
   - Allwinner updates for misc SoCs and systems

  ... and a _large_ number of other changes across the field.  Devices
  added to SoC DTSI and board DTS files for a number of SoC vendors, new
  product boards on already-supported SoCs, cleanups and refactorings of
  existing DTS/DTSI files and a bunch of other changes"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (469 commits)
  ARM: dts: compulab: add new board description
  ARM: versatile: add the syscon LEDs to the DT
  dts: vt8500: Fix errors in SDHC node for WM8505
  ARM: dts: imx6q: clean up unused ipu2grp
  ARM: dts: silk: Add compatible property to "partitions" node
  ARM: dts: gose: Add compatible property to "partitions" node
  ARM: dts: porter: Add compatible property to "partitions" node
  ARM: dts: koelsch: Add compatible property to "partitions" node
  ARM: dts: lager: Add compatible property to "partitions" node
  ARM: dts: bockw: Add compatible property to "partitions" node
  ARM: dts: meson8b: Add watchdog node
  Documentation: watchdog: Add new bindings for meson8b
  ARM: meson: Add status LED for Odroid-C1
  ARM: dts: uniphier: fix a typo in comment block
  ARM: bcm2835: Add the auxiliary clocks to the device tree.
  ARM: bcm2835: Add devicetree for bcm2836 and Raspberry Pi 2 B
  ARM: bcm2835: Move the CPU/peripheral include out of common RPi DT.
  ARM: bcm2835: Split the DT for peripherals from the DT for the CPU
  ARM: realview: set up cache correctly on the PB11MPCore
  ARM: dts: Unify G2D device node with other devices on exynos4
  ...
</content>
</entry>
<entry>
<title>clk: s3c2410: removed unneeded variable in s3c24xx_clkout_set_parent</title>
<updated>2015-12-16T15:36:04Z</updated>
<author>
<name>Prasanna Karthik</name>
</author>
<published>2015-11-30T10:08:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c5e949c1c24d67ae2813afdf02408a9b0c6fe55c'/>
<id>urn:sha1:c5e949c1c24d67ae2813afdf02408a9b0c6fe55c</id>
<content type='text'>
Remove unneeded variable used to store return value.

Signed-off-by: Prasanna Karthik &lt;mkarthi3@visteon.com&gt;
Signed-off-by: Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;
</content>
</entry>
<entry>
<title>clk: exynos: use irqsave version of spin_lock to avoid deadlock with irqs</title>
<updated>2015-12-16T15:36:03Z</updated>
<author>
<name>Marek Szyprowski</name>
</author>
<published>2015-12-11T14:38:40Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6b4feaea251a97bf08c7d41eabdec07f63a11073'/>
<id>urn:sha1:6b4feaea251a97bf08c7d41eabdec07f63a11073</id>
<content type='text'>
It is allowed to enable/disable clocks from interrupts, so common Exynos
ARM clock management code for CPUfreq should use 'irqsave' version of
spin_lock calls to avoid potential deadlock caused by spin_lock recursion.
The same spin_lock is used by gate/mux clocks during enable/disable calls.

This deadlock, can be reproduced by enabling CPUfreq (ondemand or
userspace) and decoding video with s5p-mfc driver.

Relevant stack trace:
[ 5928.061534] BUG: spinlock recursion on CPU#0, bash/1252
[ 5928.061609]  lock: 0xee80454c, .magic: dead4ead, .owner: bash/1252, .owner_cpu: 0
[ 5928.068586] CPU: 0 PID: 1252 Comm: bash Tainted: G        W       4.4.0-rc4-00001-g447a7fd #678
[ 5928.077260] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[ 5928.083359] [&lt;c00153dc&gt;] (unwind_backtrace) from [&lt;c00121b4&gt;] (show_stack+0x10/0x14)
[ 5928.091072] [&lt;c00121b4&gt;] (show_stack) from [&lt;c0213e28&gt;] (dump_stack+0x68/0xb8)
[ 5928.098275] [&lt;c0213e28&gt;] (dump_stack) from [&lt;c005c1ec&gt;] (do_raw_spin_lock+0x184/0x1ac)
[ 5928.106177] [&lt;c005c1ec&gt;] (do_raw_spin_lock) from [&lt;c05cfa98&gt;] (_raw_spin_lock_irqsave+0x20/0x28)
[ 5928.114943] [&lt;c05cfa98&gt;] (_raw_spin_lock_irqsave) from [&lt;c0468698&gt;] (clk_gate_endisable+0x24/0x98)
[ 5928.123882] [&lt;c0468698&gt;] (clk_gate_endisable) from [&lt;c0464d40&gt;] (clk_core_disable+0x60/0x84)
[ 5928.132299] [&lt;c0464d40&gt;] (clk_core_disable) from [&lt;c0465e00&gt;] (clk_disable+0x24/0x30)
[ 5928.140117] [&lt;c0465e00&gt;] (clk_disable) from [&lt;c03f3b80&gt;] (s5p_mfc_handle_frame+0x254/0x860)
[ 5928.148445] [&lt;c03f3b80&gt;] (s5p_mfc_handle_frame) from [&lt;c03f4b34&gt;] (s5p_mfc_irq+0x890/0xa24)
[ 5928.156778] [&lt;c03f4b34&gt;] (s5p_mfc_irq) from [&lt;c00627bc&gt;] (handle_irq_event_percpu+0x50/0x14c)
[ 5928.165283] [&lt;c00627bc&gt;] (handle_irq_event_percpu) from [&lt;c00628f0&gt;] (handle_irq_event+0x38/0x5c)
[ 5928.174143] [&lt;c00628f0&gt;] (handle_irq_event) from [&lt;c0065864&gt;] (handle_fasteoi_irq+0xdc/0x1a4)
[ 5928.182645] [&lt;c0065864&gt;] (handle_fasteoi_irq) from [&lt;c0062090&gt;] (generic_handle_irq+0x18/0x28)
[ 5928.191236] [&lt;c0062090&gt;] (generic_handle_irq) from [&lt;c00621a4&gt;] (__handle_domain_irq+0x6c/0xdc)
[ 5928.199917] [&lt;c00621a4&gt;] (__handle_domain_irq) from [&lt;c0009470&gt;] (gic_handle_irq+0x4c/0x98)
[ 5928.208249] [&lt;c0009470&gt;] (gic_handle_irq) from [&lt;c0012c54&gt;] (__irq_svc+0x54/0x90)
[ 5928.215709] Exception stack(0xeddb5cb8 to 0xeddb5d00)
[ 5928.220745] 5ca0:                                                       ee80454c faddfadc
[ 5928.228906] 5cc0: 00000000 01000001 ee831ce0 f8114200 ee807c00 01130520 00000403 eddb5d84
[ 5928.237063] 5ce0: ee807c48 2faf0800 ee807c0c eddb5d08 c046b618 c046b634 20000053 ffffffff
[ 5928.245225] [&lt;c0012c54&gt;] (__irq_svc) from [&lt;c046b634&gt;] (exynos_cpuclk_notifier_cb+0x170/0x270)
[ 5928.253823] [&lt;c046b634&gt;] (exynos_cpuclk_notifier_cb) from [&lt;c003cb58&gt;] (notifier_call_chain+0x44/0x84)
[ 5928.263106] [&lt;c003cb58&gt;] (notifier_call_chain) from [&lt;c003ccd4&gt;] (__srcu_notifier_call_chain+0x6c/0x9c)
[ 5928.272480] [&lt;c003ccd4&gt;] (__srcu_notifier_call_chain) from [&lt;c003cd1c&gt;] (srcu_notifier_call_chain+0x18/0x20)
[ 5928.282288] [&lt;c003cd1c&gt;] (srcu_notifier_call_chain) from [&lt;c0464ed0&gt;] (__clk_notify+0x6c/0x74)
[ 5928.290881] [&lt;c0464ed0&gt;] (__clk_notify) from [&lt;c0465388&gt;] (clk_propagate_rate_change+0xa0/0xac)
[ 5928.299561] [&lt;c0465388&gt;] (clk_propagate_rate_change) from [&lt;c0465378&gt;] (clk_propagate_rate_change+0x90/0xac)
[ 5928.309370] [&lt;c0465378&gt;] (clk_propagate_rate_change) from [&lt;c04666fc&gt;] (clk_core_set_rate_nolock+0x64/0xa8)
[ 5928.319091] [&lt;c04666fc&gt;] (clk_core_set_rate_nolock) from [&lt;c0466760&gt;] (clk_set_rate+0x20/0x30)
[ 5928.327686] [&lt;c0466760&gt;] (clk_set_rate) from [&lt;c0428c70&gt;] (set_target+0xe8/0x23c)
[ 5928.335152] [&lt;c0428c70&gt;] (set_target) from [&lt;c04244d0&gt;] (__cpufreq_driver_target+0x184/0x29c)
[ 5928.343655] [&lt;c04244d0&gt;] (__cpufreq_driver_target) from [&lt;c0427128&gt;] (cpufreq_set+0x44/0x64)
[ 5928.352074] [&lt;c0427128&gt;] (cpufreq_set) from [&lt;c0423948&gt;] (store_scaling_setspeed+0x5c/0x74)
[ 5928.360407] [&lt;c0423948&gt;] (store_scaling_setspeed) from [&lt;c04238d0&gt;] (store+0x7c/0x98)
[ 5928.368221] [&lt;c04238d0&gt;] (store) from [&lt;c0132540&gt;] (sysfs_kf_write+0x44/0x48)
[ 5928.375338] [&lt;c0132540&gt;] (sysfs_kf_write) from [&lt;c0131b9c&gt;] (kernfs_fop_write+0xb8/0x1bc)
[ 5928.383496] [&lt;c0131b9c&gt;] (kernfs_fop_write) from [&lt;c00d71f8&gt;] (__vfs_write+0x2c/0xd4)
[ 5928.391308] [&lt;c00d71f8&gt;] (__vfs_write) from [&lt;c00d7de8&gt;] (vfs_write+0xa0/0x144)
[ 5928.398598] [&lt;c00d7de8&gt;] (vfs_write) from [&lt;c00d8048&gt;] (SyS_write+0x44/0x84)
[ 5928.405631] [&lt;c00d8048&gt;] (SyS_write) from [&lt;c000f540&gt;] (ret_fast_syscall+0x0/0x3c)

CC: stable@vger.kernel.org  # v4.2+
Signed-off-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
Signed-off-by: Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;
</content>
</entry>
<entry>
<title>clk: samsung: exynos542x: fix MFC clock hierarchy parent</title>
<updated>2015-12-16T15:36:02Z</updated>
<author>
<name>Marek Szyprowski</name>
</author>
<published>2015-12-08T13:29:32Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=34d3b6746778d512a1be9b8372b03238e21a2e2c'/>
<id>urn:sha1:34d3b6746778d512a1be9b8372b03238e21a2e2c</id>
<content type='text'>
Proper source for MFC block is mout_user_aclk333 (in datasheet named
USER_MUX_ACLK_333), not the output of CLKDIV_ACLK_333 MUX.

Signed-off-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
Signed-off-by: Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;
</content>
</entry>
<entry>
<title>clk: samsung: exynos542x/5800: fix cpu clock configuration data</title>
<updated>2015-12-16T15:35:57Z</updated>
<author>
<name>Bartlomiej Zolnierkiewicz</name>
</author>
<published>2015-12-15T17:33:19Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=54abbdb4ee53f7bfd5c82be1c0b8e0d1447fcb06'/>
<id>urn:sha1:54abbdb4ee53f7bfd5c82be1c0b8e0d1447fcb06</id>
<content type='text'>
Fix cpu clock configuration data for Exynos5422/5800 SoCs
(they use higher PCLK_DBG divider values than Exynos5420 and
support additional frequencies).

Based on Hardkernel's kernel for ODROID-XU3 board.

Cc: Thomas Abraham &lt;thomas.ab@samsung.com&gt;
Signed-off-by: Bartlomiej Zolnierkiewicz &lt;b.zolnierkie@samsung.com&gt;
Signed-off-by: Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;
</content>
</entry>
<entry>
<title>clk: samsung: exynos5420: add cpu clock configuration data and instantiate cpu clock</title>
<updated>2015-12-16T15:35:26Z</updated>
<author>
<name>Thomas Abraham</name>
</author>
<published>2015-12-15T17:33:16Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=bee4f87f01dc30fcf9e05eb55b833f89fd9bb4f4'/>
<id>urn:sha1:bee4f87f01dc30fcf9e05eb55b833f89fd9bb4f4</id>
<content type='text'>
With the addition of the new Samsung specific cpu-clock type, the
arm clock can be represented as a cpu-clock type. Add the CPU clock
configuration data and instantiate the CPU clock type for Exynos5420.

Changes by Bartlomiej:
- split Exynos5420 support from the original patches
- moved E5420_[EGL,KFC]_DIV0() macros to clk-exynos5420.c

Signed-off-by: Thomas Abraham &lt;thomas.ab@samsung.com&gt;
Signed-off-by: Bartlomiej Zolnierkiewicz &lt;b.zolnierkie@samsung.com&gt;
Signed-off-by: Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;
</content>
</entry>
<entry>
<title>clk: samsung: exynos542x: add missing parent GSCL block clocks</title>
<updated>2015-12-16T15:35:17Z</updated>
<author>
<name>Marek Szyprowski</name>
</author>
<published>2015-12-08T13:46:54Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c0feb268da73ae3ede23ae60d6ccc551c4e93250'/>
<id>urn:sha1:c0feb268da73ae3ede23ae60d6ccc551c4e93250</id>
<content type='text'>
This patch adds clocks, which are required for preserving parent clock
configuration on GSCL power domain on/off.

Signed-off-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
Signed-off-by: Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;
</content>
</entry>
<entry>
<title>clk: samsung: exynos4: Add SSS gate clock</title>
<updated>2015-11-18T13:02:02Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
</author>
<published>2015-10-19T05:00:32Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=94af7a3c310f5877dc6f756179b92f24f89a9b08'/>
<id>urn:sha1:94af7a3c310f5877dc6f756179b92f24f89a9b08</id>
<content type='text'>
Add a gate clock for controlling all clocks of Security Sub System
(SSS).

Signed-off-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Acked-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2015-11-10T23:06:26Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2015-11-10T23:06:26Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c0d6fe2f01c475cc137d90607a07578586883df8'/>
<id>urn:sha1:c0d6fe2f01c475cc137d90607a07578586883df8</id>
<content type='text'>
Pull ARM DT updates from Olof Johansson:
 "As usual, this is the massive branch we have for each release.  Lots
  of various updates and additions of hardware descriptions on existing
  hardware, as well as the usual additions of new boards and SoCs.

  This is also the first release where we've started mixing 64- and
  32-bit DT updates in one branch.

  (Specific details on what's actually here and new is pretty easy to
  tell from the diffstat, so there's little point in duplicating listing
  it here)"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (499 commits)
  ARM: dts: uniphier: add system-bus-controller nodes
  ARM64: juno: disable NOR flash node by default
  ARM: dts: uniphier: add outer cache controller nodes
  arm64: defconfig: Enable PCI generic host bridge by default
  arm64: Juno: Add support for the PCIe host bridge on Juno R1
  Documentation: of: Document the bindings used by Juno R1 PCIe host bridge
  ARM: dts: uniphier: add I2C aliases for ProXstream2 boards
  dts/Makefile: Add build support for LS2080a QDS &amp; RDB board DTS
  dts/ls2080a: Add DTS support for LS2080a QDS &amp; RDB boards
  dts/ls2080a: Update Simulator DTS to add support of various peripherals
  dts/ls2080a: Remove text about writing to Free Software Foundation
  dts/ls2080a: Update DTSI to add support of various peripherals
  doc: DTS: Update DWC3 binding to provide reference to generic bindings
  doc/bindings: Update GPIO devicetree binding documentation for LS2080A
  Documentation/dts: Move FSL board-specific bindings out of /powerpc
  Documentation: DT: Add entry for FSL LS2080A QDS and RDB boards
  arm64: Rename FSL LS2085A SoC support code to LS2080A
  arm64: Use generic Layerscape SoC family naming
  ARM: dts: uniphier: add ProXstream2 Vodka board support
  ARM: dts: uniphier: add ProXstream2 Gentil board support
  ...
</content>
</entry>
<entry>
<title>Merge branch 'next/arm64' into next/dt</title>
<updated>2015-11-10T00:35:19Z</updated>
<author>
<name>Olof Johansson</name>
</author>
<published>2015-11-10T00:35:19Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3e4dda70cc989a4f8079541972942609229e9f55'/>
<id>urn:sha1:3e4dda70cc989a4f8079541972942609229e9f55</id>
<content type='text'>
Merging in the few patches I had kept separate from main next/dt, since others
got merged here directly.

* next/arm64:
  arm64: defconfig: Enable PCI generic host bridge by default
  arm64: Juno: Add support for the PCIe host bridge on Juno R1
  Documentation: of: Document the bindings used by Juno R1 PCIe host bridge
  arm64: dts: mt8173: Add clocks for SCPSYS unit
  arm64: dts: mt8173: Add subsystem clock controller device nodes
  + Linux 4.3-rc5
</content>
</entry>
</feed>
