kernel.git/drivers/clk/mvebu, branch linux-3.8.y

clk: mvebu/clk-cpu.c: fix memory leakage

2013-01-23T01:06:52Z

the variable cpuclk and clk_name should be properly freed when error happens. Signed-off-by: Cong Ding Acked-by: Jason Cooper Acked-by: Gregory CLEMENT Acked-by: Mike Turquette Signed-off-by: Jason Cooper

clk: mvebu: Remove inappropriate __init tagging

2013-01-06T17:53:13Z

If the Orion WDT driver is built as a module, an opps occurs during clk lookup when calling mvebu_clk_gating_get_src(). Remove the inappropriate __init tag so the function is available for modules after kernel init. Signed-off-by: Joshua Coombs Signed-off-by: Andrew Lunn Signed-off-by: Jason Cooper

clk: mvebu: armada 370/XP add clock gating control provider for DT

2012-11-20T13:44:00Z

Signed-off-by: Gregory CLEMENT Signed-off-by: Andrew Lunn Signed-off-by: Thomas Petazzoni

clk: mvebu: add clock gating control provider for DT

2012-11-20T13:43:24Z

This driver allows to provide DT clocks for clock gates found on Marvell Dove and Kirkwood SoCs. The clock gates are referenced by the phandle index of the corresponding bit in the clock gating control register to ease lookup in the datasheet. Signed-off-by: Sebastian Hesselbarth

clk: mvebu: add armada-370-xp CPU specific clocks

2012-11-20T13:35:42Z

Add Armada 370/XP specific CPU clocks Signed-off-by: Gregory CLEMENT Signed-off-by: Thomas Petazzoni Tested-by: Gregory CLEMENT

clk: mvebu: add mvebu core clocks.

2012-11-20T13:34:08Z

This driver allows to provide DT clocks for core clocks found on Marvell Kirkwood, Dove & 370/XP SoCs. The core clock frequencies and ratios are determined by decoding the Sample-At-Reset registers. Although technically correct, using a divider of 0 will lead to div_by_zero panic. Let's use a ratio of 0/1 instead to fail later with a zero clock. Signed-off-by: Gregory CLEMENT Signed-off-by: Sebastian Hesselbarth Signed-off-by: Andrew Lunn Tested-by Gregory CLEMENT