kernel.git/drivers/clk/mediatek/Makefile, branch linux-rolling-stable

clk: mediatek: Add MT8196 vencsys clock support

2025-09-21T16:36:22Z

Add support for the MT8196 vencsys clock controller, which provides clock gate control for the video encoder. Reviewed-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Laura Nao Signed-off-by: Stephen Boyd

clk: mediatek: Add MT8196 vdecsys clock support

2025-09-21T16:36:20Z

Add support for the MT8196 vdecsys clock controller, which provides clock gate control for the video decoder. Reviewed-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Laura Nao Signed-off-by: Stephen Boyd

clk: mediatek: Add MT8196 ovl1 clock support

2025-09-21T16:36:19Z

Add support for the MT8196 ovl1 clock controller, which provides clock gate control for the display system. It is integrated with the mtk-mmsys driver, which registers the ovl1 clock driver via platform_device_register_data(). Reviewed-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Laura Nao Signed-off-by: Stephen Boyd

clk: mediatek: Add MT8196 ovl0 clock support

2025-09-21T16:36:18Z

Add support for the MT8196 ovl0 clock controller, which provides clock gate control for the display system. It is integrated with the mtk-mmsys driver, which registers the ovl0 clock driver via platform_device_register_data(). Reviewed-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Laura Nao Signed-off-by: Stephen Boyd

clk: mediatek: Add MT8196 disp-ao clock support

2025-09-21T16:36:17Z

Add support for the MT8196 disp-ao clock controller, which provides clock gate control for the display system. It is integrated with the mtk-mmsys driver, which registers the disp-ao clock driver via platform_device_register_data(). Reviewed-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Laura Nao Signed-off-by: Stephen Boyd

clk: mediatek: Add MT8196 disp1 clock support

2025-09-21T16:36:15Z

Add support for the MT8196 disp1 clock controller, which provides clock gate control for the display system. It is integrated with the mtk-mmsys driver, which registers the disp1 clock driver via platform_device_register_data(). Reviewed-by: Chen-Yu Tsai # CLK_OPS_PARENT_ENABLE removal Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Laura Nao Signed-off-by: Stephen Boyd

clk: mediatek: Add MT8196 disp0 clock support

2025-09-21T16:36:14Z

Add support for the MT8196 disp0 clock controller, which provides clock gate control for the display system. It is integrated with the mtk-mmsys driver, which registers the disp0 clock driver via platform_device_register_data(). Reviewed-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Laura Nao Signed-off-by: Stephen Boyd

clk: mediatek: Add MT8196 mfg clock support

2025-09-21T16:36:13Z

Add support for the MT8196 mfg clock controller, which provides PLL control for the GPU. Reviewed-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Laura Nao Signed-off-by: Stephen Boyd

clk: mediatek: Add MT8196 mdpsys clock support

2025-09-21T16:36:12Z

Add support for the MT8196 mdpsys clock controller, which provides clock gate control for MDP. Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Chen-Yu Tsai # CLK_OPS_PARENT_ENABLE removal Signed-off-by: Laura Nao Signed-off-by: Stephen Boyd

clk: mediatek: Add MT8196 mcu clock support

2025-09-21T16:36:10Z

Add support for the MT8196 mcu clock controller, which provides PLL control for MCU. Reviewed-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Laura Nao Signed-off-by: Stephen Boyd