kernel.git/drivers/clk/bcm/Makefile, branch linux-4.5.y

Merge branch 'clk-bcm2835' into clk-next

2015-12-23T00:49:38Z

clk: bcm2835: Add a driver for the auxiliary peripheral clock gates.

2015-12-23T00:47:17Z

There are a pair of SPI masters and a mini UART that were last minute additions. As a result, they didn't get integrated in the same way as the other gates off of the VPU clock in CPRMAN. Signed-off-by: Eric Anholt Signed-off-by: Michael Turquette

clk: bcm: Add BCM63138 clock support

2015-11-20T23:46:27Z

BCM63138 has a simple clocking domain which is primarily the ARMPLL clocking complex, from which the ARM (CPU), APB and AXI clocks would be derived from. Since the ARMPLL controller is entirely compatible with the iProc ARM PLL, we just initialize it without additional parameters. Signed-off-by: Florian Fainelli Signed-off-by: Stephen Boyd

Merge branch 'clk-iproc' into clk-next

2015-10-22T00:28:19Z

* clk-iproc: clk: iproc: define Broadcom NS2 iProc clock binding clk: iproc: define Broadcom NSP iProc clock binding clk: ns2: add clock support for Broadcom Northstar 2 SoC clk: iproc: Separate status and control variables clk: iproc: Split off dig_filter clk: iproc: Add PLL base write function clk: nsp: add clock support for Broadcom Northstar Plus SoC clk: iproc: Add PWRCTRL support clk: cygnus: Convert all macros to all caps ARM: cygnus: fix link failures when CONFIG_COMMON_CLK_IPROC is disabled

clk: ns2: add clock support for Broadcom Northstar 2 SoC

2015-10-22T00:22:58Z

The Broadcom Northstar 2 SoC is architected under the iProc architecture. It has the following PLLs: GENPLL SCR, GENPLL SW, LCPLL DDR, LCPLL Ports, all derived from an onboard crystal. Signed-off-by: Jon Mason Signed-off-by: Stephen Boyd

clk: nsp: add clock support for Broadcom Northstar Plus SoC

2015-10-21T23:53:20Z

The Broadcom Northstar Plus SoC is architected under the iProc architecture. It has the following PLLs: ARMPLL, GENPLL, LCPLL0, all derived from an onboard crystal. Signed-off-by: Jon Mason Signed-off-by: Stephen Boyd

clk: bcm2835: Move under bcm/ with other Broadcom SoC clk drivers.

2015-10-02T00:12:03Z

clk-bcm2835.c predates the drivers under bcm/, but all the new BCM drivers are going in there so let's follow them. Signed-off-by: Eric Anholt Acked-by: Stephen Warren Signed-off-by: Stephen Boyd

clk: cygnus: add clock support for Broadcom Cygnus

2015-06-18T19:36:39Z

The Broadcom Cygnus SoC is architected under the iProc architecture. It has the following PLLs: ARMPLL, GENPLL, LCPLL0, MIPIPLL, all dervied from an onboard crystal. Cygnus also has various ASIU clocks that are derived directly from the onboard crystal. Signed-off-by: Ray Jui Reviewed-by: Scott Branden Signed-off-by: Michael Turquette

clk: iproc: add initial common clock support

2015-06-18T19:36:38Z

This adds basic and generic support for various iProc PLLs and clocks including the ARMPLL, GENPLL, LCPLL, MIPIPLL, and ASIU clocks. SoCs under the iProc architecture can define their specific register offsets and clock parameters for their PLL and clock controllers. These parameters can be passed as arugments into the generic iProc PLL and clock setup functions Derived from code originally provided by Jonathan Richardson Signed-off-by: Ray Jui Reviewed-by: Scott Branden Signed-off-by: Michael Turquette

clk: bcm21664: use common clock framework

2014-04-30T18:51:44Z

Define the set of CCUs and provided clocks sufficient to satisfy the needs of all the existing clock references for BCM21664. Replace the "fake" fixed-rate clocks used previously with "real" ones. Note that only the minimal set of these clocks and CCUs is defined here. More clock definitions will need to be added as required by the addition of additional drivers. Signed-off-by: Alex Elder Signed-off-by: Mike Turquette