<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/crypto/async_tx/async_tx.c, branch linux-2.6.28.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.28.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.28.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2009-02-02T17:53:29Z</updated>
<entry>
<title>dmaengine: fix dependency chaining</title>
<updated>2009-02-02T17:53:29Z</updated>
<author>
<name>Yuri Tikhonov</name>
</author>
<published>2009-01-29T12:37:13Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f8b9d6d4e097b38b199253243b361bee9795cd14'/>
<id>urn:sha1:f8b9d6d4e097b38b199253243b361bee9795cd14</id>
<content type='text'>
commit dd59b8537f6cb53ab863fafad86a5828f1e889a2 upstream


 ASYNC_TX: fix dependency chaining

 In ASYNC_TX we track the dependencies between the descriptors
using the 'next' pointers of the structures. These pointers are
set to NULL as soon as the corresponding descriptor has been
submitted to the channel (in async_tx_run_dependencies()).
 But, the first 'next' in chain still remains set, regardless
the fact, that tx-&gt;next is already submitted. This may lead to
multiple submisions of the same descriptor. This patch fixes this.

Signed-off-by: Yuri Tikhonov &lt;yur@emcraft.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@suse.de&gt;

</content>
</entry>
<entry>
<title>async_tx: make async_tx_run_dependencies() easier to read</title>
<updated>2008-09-14T02:57:04Z</updated>
<author>
<name>Dan Williams</name>
</author>
<published>2008-09-14T02:57:04Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=fdb0ac80618729e6b12121c66449b8532990eaf3'/>
<id>urn:sha1:fdb0ac80618729e6b12121c66449b8532990eaf3</id>
<content type='text'>
* Rename 'next' to 'dep'
* Move the channel switch check inside the loop to simplify
  termination

Acked-by: Ilya Yanok &lt;yanok@emcraft.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
</entry>
<entry>
<title>async_tx: fix the bug in async_tx_run_dependencies</title>
<updated>2008-09-05T15:15:47Z</updated>
<author>
<name>Yuri Tikhonov</name>
</author>
<published>2008-09-05T15:15:47Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=de24125dd0a452bfd4502fc448e3534c5d2e87aa'/>
<id>urn:sha1:de24125dd0a452bfd4502fc448e3534c5d2e87aa</id>
<content type='text'>
Should clear the next pointer of the TX if we are sure that the
next TX (say NXT) will be submitted to the channel too. Overwise,
we break the chain of descriptors, because we lose the information
about the next descriptor to run. So next time, when invoke
async_tx_run_dependencies() with TX, it's TX-&gt;next will be NULL, and
NXT will be never submitted.

Cc: &lt;stable@kernel.org&gt;		[2.6.26]
Signed-off-by: Yuri Tikhonov &lt;yur@emcraft.com&gt;
Signed-off-by: Ilya Yanok &lt;yanok@emcraft.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx</title>
<updated>2008-07-23T19:03:18Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2008-07-23T19:03:18Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5554b35933245e95710d709175e14c02cbc956a4'/>
<id>urn:sha1:5554b35933245e95710d709175e14c02cbc956a4</id>
<content type='text'>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (24 commits)
  I/OAT: I/OAT version 3.0 support
  I/OAT: tcp_dma_copybreak default value dependent on I/OAT version
  I/OAT: Add watchdog/reset functionality to ioatdma
  iop_adma: cleanup iop_chan_xor_slot_count
  iop_adma: document how to calculate the minimum descriptor pool size
  iop_adma: directly reclaim descriptors on allocation failure
  async_tx: make async_tx_test_ack a boolean routine
  async_tx: remove depend_tx from async_tx_sync_epilog
  async_tx: export async_tx_quiesce
  async_tx: fix handling of the "out of descriptor" condition in async_xor
  async_tx: ensure the xor destination buffer remains dma-mapped
  async_tx: list_for_each_entry_rcu() cleanup
  dmaengine: Driver for the Synopsys DesignWare DMA controller
  dmaengine: Add slave DMA interface
  dmaengine: add DMA_COMPL_SKIP_{SRC,DEST}_UNMAP flags to control dma unmap
  dmaengine: Add dma_client parameter to device_alloc_chan_resources
  dmatest: Simple DMA memcpy test client
  dmaengine: DMA engine driver for Marvell XOR engine
  iop-adma: fix platform driver hotplug/coldplug
  dmaengine: track the number of clients using a channel
  ...

Fixed up conflict in drivers/dca/dca-sysfs.c manually
</content>
</entry>
<entry>
<title>async_tx: remove depend_tx from async_tx_sync_epilog</title>
<updated>2008-07-18T00:59:55Z</updated>
<author>
<name>Dan Williams</name>
</author>
<published>2008-07-18T00:59:55Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3dce01713723bbcc92562bd4488e8b840a4f786c'/>
<id>urn:sha1:3dce01713723bbcc92562bd4488e8b840a4f786c</id>
<content type='text'>
All callers of async_tx_sync_epilog have called async_tx_quiesce on the
depend_tx, so async_tx_sync_epilog need only call the callback to
complete the operation.

Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
</entry>
<entry>
<title>async_tx: export async_tx_quiesce</title>
<updated>2008-07-18T00:59:55Z</updated>
<author>
<name>Dan Williams</name>
</author>
<published>2008-07-18T00:59:55Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d2c52b7983b95bb3fc2a784e479f832f142d4523'/>
<id>urn:sha1:d2c52b7983b95bb3fc2a784e479f832f142d4523</id>
<content type='text'>
Replace open coded "wait and acknowledge" instances with async_tx_quiesce.

Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
</entry>
<entry>
<title>async_tx: list_for_each_entry_rcu() cleanup</title>
<updated>2008-07-18T00:59:47Z</updated>
<author>
<name>Li Zefan</name>
</author>
<published>2008-07-18T00:59:47Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=20fc190b0ef58bf8b3b0bff9de122083956f82ec'/>
<id>urn:sha1:20fc190b0ef58bf8b3b0bff9de122083956f82ec</id>
<content type='text'>
In the rcu update side, don't use list_for_each_entry_rcu().

Signed-off-by: Li Zefan &lt;lizf@cn.fujitsu.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
</entry>
<entry>
<title>rcu: split list.h and move rcu-protected lists into rculist.h</title>
<updated>2008-05-19T08:01:37Z</updated>
<author>
<name>Franck Bui-Huu</name>
</author>
<published>2008-05-12T19:21:05Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=82524746c27fa418c250a56dd7606b9d3fc79826'/>
<id>urn:sha1:82524746c27fa418c250a56dd7606b9d3fc79826</id>
<content type='text'>
Move rcu-protected lists from list.h into a new header file rculist.h.

This is done because list are a very used primitive structure all over the
kernel and it's currently impossible to include other header files in this
list.h without creating some circular dependencies.

For example, list.h implements rcu-protected list and uses rcu_dereference()
without including rcupdate.h.  It actually compiles because users of
rcu_dereference() are macros.  Others RCU functions could be used too but
aren't probably because of this.

Therefore this patch creates rculist.h which includes rcupdates without to
many changes/troubles.

Signed-off-by: Franck Bui-Huu &lt;fbuihuu@gmail.com&gt;
Acked-by: Paul E. McKenney &lt;paulmck@linux.vnet.ibm.com&gt;
Acked-by: Josh Triplett &lt;josh@kernel.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>dmaengine: ack to flags: make use of the unused bits in the 'ack' field</title>
<updated>2008-04-17T20:25:54Z</updated>
<author>
<name>Dan Williams</name>
</author>
<published>2008-04-18T03:17:26Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=636bdeaa1243327501edfd2a597ed7443eb4239a'/>
<id>urn:sha1:636bdeaa1243327501edfd2a597ed7443eb4239a</id>
<content type='text'>
'ack' is currently a simple integer that flags whether or not a client is done
touching fields in the given descriptor.  It is effectively just a single bit
of information.  Converting this to a flags parameter allows the other bits to
be put to use to control completion actions, like dma-unmap, and capture
results, like xor-zero-sum == 0.

Changes are one of:
1/ convert all open-coded -&gt;ack manipulations to use async_tx_ack
   and async_tx_test_ack.
2/ set the ack bit at prep time where possible
3/ make drivers store the flags at prep time
4/ add flags to the device_prep_dma_interrupt prototype

Acked-by: Maciej Sosnowski &lt;maciej.sosnowski@intel.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
</entry>
<entry>
<title>async_tx: fix multiple dependency submission</title>
<updated>2008-04-17T20:25:05Z</updated>
<author>
<name>Dan Williams</name>
</author>
<published>2008-04-18T03:17:25Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=19242d7233df7d658405d4b7ee1758d21414cfaa'/>
<id>urn:sha1:19242d7233df7d658405d4b7ee1758d21414cfaa</id>
<content type='text'>
Shrink struct dma_async_tx_descriptor and introduce
async_tx_channel_switch to properly inject a channel switch interrupt in
the descriptor stream.  This simplifies the locking model as drivers no
longer need to handle dma_async_tx_descriptor.lock.

Acked-by: Shannon Nelson &lt;shannon.nelson@intel.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
</entry>
</feed>
