<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/xtensa/kernel, branch linux-2.6.24.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.24.y</id>
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<updated>2007-10-19T18:53:43Z</updated>
<entry>
<title>Use helpers to obtain task pid in printks (arch code)</title>
<updated>2007-10-19T18:53:43Z</updated>
<author>
<name>Alexey Dobriyan</name>
</author>
<published>2007-10-19T06:40:41Z</published>
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<id>urn:sha1:19c5870c0eefd27c6d09d867465e0571262e05d0</id>
<content type='text'>
One of the easiest things to isolate is the pid printed in kernel log.
There was a patch, that made this for arch-independent code, this one makes
so for arch/xxx files.

It took some time to cross-compile it, but hopefully these are all the
printks in arch code.

Signed-off-by: Alexey Dobriyan &lt;adobriyan@openvz.org&gt;
Signed-off-by: Pavel Emelyanov &lt;xemul@openvz.org&gt;
Cc: &lt;linux-arch@vger.kernel.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>Consolidate PTRACE_DETACH</title>
<updated>2007-10-16T16:42:49Z</updated>
<author>
<name>Alexey Dobriyan</name>
</author>
<published>2007-10-16T08:23:45Z</published>
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<id>urn:sha1:1bcf548293aef19b0797348332cf1dfbf2116cef</id>
<content type='text'>
Identical handlers of PTRACE_DETACH go into ptrace_request().
Not touching compat code.
Not touching archs that don't call ptrace_request.

Signed-off-by: Alexey Dobriyan &lt;adobriyan@sw.ru&gt;
Acked-by: Christoph Hellwig &lt;hch@infradead.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>[XTENSA] Add support for cache-aliasing</title>
<updated>2007-08-27T20:54:16Z</updated>
<author>
<name>Chris Zankel</name>
</author>
<published>2007-08-22T17:14:51Z</published>
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<id>urn:sha1:6656920b0b50beacb6cb64cf55273cbb686e436e</id>
<content type='text'>
Add support for processors that have cache-aliasing issues, such as
the Stretch S5000 processor. Cache-aliasing means that the size of
the cache (for one way) is larger than the page size, thus, a page
can end up in several places in cache depending on the virtual to
physical translation. The method used here is to map a user page
temporarily through the auto-refill way 0 and of of the DTLB.
We probably will want to revisit this issue and use a better
approach with kmap/kunmap.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
</entry>
<entry>
<title>[XTENSA] Add kernel module support</title>
<updated>2007-08-27T20:54:06Z</updated>
<author>
<name>Chris Zankel</name>
</author>
<published>2007-08-14T20:02:06Z</published>
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<id>urn:sha1:ff6fd469885aafa5ec387babcb6537f3c00d6df0</id>
<content type='text'>
Add kernel module support.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
</entry>
<entry>
<title>[XTENSA] Add support for executable/non-executable feature in the mmu</title>
<updated>2007-08-27T20:54:01Z</updated>
<author>
<name>Chris Zankel</name>
</author>
<published>2007-08-07T06:57:57Z</published>
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<id>urn:sha1:01858d1b0b406307626bbc01238391b06aae2c20</id>
<content type='text'>
Newer processor versions starting with Xtensa6/LX2 support an 'executable'
bit for memory pages. This bit replaces the 'valid' bit, so it must be
always set to one for older processor versions. To mark a page invalid, we now
set the cache-attributes to b11, which is backward compatible.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
</entry>
<entry>
<title>[XTENSA] Initialize semaphore_wake_lock</title>
<updated>2007-08-27T20:53:51Z</updated>
<author>
<name>Chris Zankel</name>
</author>
<published>2007-08-05T18:51:57Z</published>
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<id>urn:sha1:5c1c8085b5dc30ae4ff0ee54039e387ed59262bf</id>
<content type='text'>
Initialize semaphore_wake_lock.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
</entry>
<entry>
<title>[XTENSA] Fix timer instabilities.</title>
<updated>2007-08-27T20:53:37Z</updated>
<author>
<name>Chris Zankel</name>
</author>
<published>2007-08-05T17:26:30Z</published>
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<id>urn:sha1:2b8aea74e78e977b1f9987e23e3e59f3ef4359f4</id>
<content type='text'>
The timer code could have missed a tick.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
</entry>
<entry>
<title>[XTENSA] Fix fadvise64_64</title>
<updated>2007-08-27T20:53:32Z</updated>
<author>
<name>Chris Zankel</name>
</author>
<published>2007-08-05T17:22:58Z</published>
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<id>urn:sha1:bc671aa9838f234ccfc794a77325628f1e41e083</id>
<content type='text'>
Xtensa passes long long arguments in a even/odd register pair,
so we also need to shuffle the arguments when passed through the
system call to avoid an empty argument register.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
</entry>
<entry>
<title>[XTENSA] Move string-io functions to io.c from pci.c</title>
<updated>2007-08-27T20:53:22Z</updated>
<author>
<name>Chris Zankel</name>
</author>
<published>2007-08-04T21:31:04Z</published>
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<id>urn:sha1:787a22d1d284b21ad810fd0bedbdefb329f31cd2</id>
<content type='text'>
The string-io functions (outs{bwl}, ins{bwl}) are independent from
the PCI option and should be in a separate file.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
</entry>
<entry>
<title>[XTENSA] Move pre-initialized structures to init_task.c</title>
<updated>2007-08-27T20:53:12Z</updated>
<author>
<name>Chris Zankel</name>
</author>
<published>2007-08-04T16:27:30Z</published>
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<id>urn:sha1:73089cbfdf0c69e061a4fa90d614679e630c6727</id>
<content type='text'>
Move all initialization structures for the initial task to it's own file.

Signed-off-by: Chris Zankel &lt;chris@zankel.net&gt;
</content>
</entry>
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