kernel.git/arch/xtensa/include/asm/vectors.h, branch linux-4.4.y

xtensa: drop unused sections and remapped reset handlers

2015-11-03T14:19:39Z

There are no .bootstrap or .ResetVector.text sections linked to the vmlinux image, drop these sections from vmlinux.ld.S. Drop RESET_VECTOR_VADDR definition only used for .ResetVector.text. Drop remapped copies of primary and secondary reset vectors, as modern gdb don't have problems stepping through instructions at arbitrary locations. Drop corresponding sections from the corresponding linker scripts. Signed-off-by: Max Filippov

xtensa: fix secondary core boot in SMP

2015-11-03T14:19:38Z

There are multiple factors adding to the issue in different configurations: - commit 17290231df16eeee ("xtensa: add fixup for double exception raised in window overflow") added function window_overflow_restore_a0_fixup to double exception vector overlapping reset vector location of secondary processor cores. - on MMUv2 cores RESET_VECTOR1_VADDR may point to uncached kernel memory making code overlapping depend on cache type and size, so that without cache or with WT cache reset vector code overwrites double exception code, making issue even harder to detect. - on MMUv3 cores RESET_VECTOR1_VADDR may point to unmapped area, as MMUv3 cores change virtual address map to match MMUv2 layout, but reset vector virtual address is given for the original MMUv3 mapping. - physical memory region of the secondary reset vector is not reserved in the physical memory map, and thus may be allocated and overwritten at arbitrary moment. Fix it as follows: - move window_overflow_restore_a0_fixup code to .text section. - define RESET_VECTOR1_VADDR so that it points to reset vector in the cacheable MMUv2 map for cores with MMU. - reserve reset vector region in the physical memory map. Drop separate literal section and build mxhead.S with text section literals. Cc: Signed-off-by: Max Filippov

xtensa: nommu: provide correct KIO addresses

2015-11-02T15:03:02Z

KIO region location is different for noMMU cores. Provide different default physical address and make KIO virtual address equal to physical. Move xtensa_get_kio_paddr function close to XCHAL_KIO_PADDR definition and define it not only for MMUv3, but for all MMU options except MMUv2. Signed-off-by: Max Filippov

xtensa: nommu: fix load address definitions

2014-10-21T09:28:53Z

Change KERNELOFFSET, LOAD_MEMORY_ADDRESS and VIRTUAL_MEMORY_ADDRESS to be relative to the start of physical memory in noMMU configuration, as there's no uniform memory remapping to KSEG starting at 0xd0000000. Signed-off-by: Max Filippov

xtensa: fix warning '"CONFIG_OF" is not defined'

2014-01-19T15:29:13Z

The warning only shows up when building MMUv3 configuration with OF support disabled. Signed-off-by: Max Filippov

xtensa: remap io area defined in device tree

2014-01-14T20:25:14Z

Use the simple-bus node to discover the io area, and remap the cached and bypass io ranges. The parent-bus-address value of the first triplet in the "ranges" property is used. This value is rounded down to the nearest 256MB boundary. The length of the io area is fixed at 256MB; the "ranges" property length value is ignored. Other limitations: (1) only the first simple-bus node is considered, and (2) only the first triplet of the "ranges" property is considered. See ePAPR 1.1 §6.5 for the simple-bus node description, and §2.3.8 for the "ranges" property description. Signed-off-by: Baruch Siach Signed-off-by: Max Filippov

xtensa: avoid duplicate of IO range definitions

2014-01-14T20:21:24Z

Define IO addresses in a single place, to make it easier to change for non-standard memory maps. Signed-off-by: Baruch Siach Signed-off-by: Max Filippov

xtensa: clean up include/asm/vectors.h

2014-01-14T18:19:47Z

- drop unused PHYSICAL_MEMORY_ADDRESS and XC_PADDR - fix NMI_VECTOR_VADDR and INTLEVEL7_VECTOR_VADDR definitions: there should be no XCHAL_ prefix in them; - fix the following warning seen with gcc-4.8.1: arch/xtensa/include/asm/vectors.h:71:5: warning: "XCHAL_HAVE_VECBASE" is not defined [-Wundef] Signed-off-by: Max Filippov Signed-off-by: Chris Zankel

xtensa: add MMU v3 support

2013-05-09T08:07:09Z

MMUv3 comes out of reset with identity vaddr -> paddr mapping in the TLB way 6: Way 6 (512 MB) Vaddr Paddr ASID Attr RWX Cache ---------- ---------- ---- ---- --- ------- 0x00000000 0x00000000 0x01 0x03 RWX Bypass 0x20000000 0x20000000 0x01 0x03 RWX Bypass 0x40000000 0x40000000 0x01 0x03 RWX Bypass 0x60000000 0x60000000 0x01 0x03 RWX Bypass 0x80000000 0x80000000 0x01 0x03 RWX Bypass 0xa0000000 0xa0000000 0x01 0x03 RWX Bypass 0xc0000000 0xc0000000 0x01 0x03 RWX Bypass 0xe0000000 0xe0000000 0x01 0x03 RWX Bypass This patch adds remapping code at the reset vector or at the kernel _start (depending on CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX) that reconfigures MMUv3 as MMUv2: Way 5 (128 MB) Vaddr Paddr ASID Attr RWX Cache ---------- ---------- ---- ---- --- ------- 0xd0000000 0x00000000 0x01 0x07 RWX WB 0xd8000000 0x00000000 0x01 0x03 RWX Bypass Way 6 (256 MB) Vaddr Paddr ASID Attr RWX Cache ---------- ---------- ---- ---- --- ------- 0xe0000000 0xf0000000 0x01 0x07 RWX WB 0xf0000000 0xf0000000 0x01 0x03 RWX Bypass Signed-off-by: Max Filippov Signed-off-by: Chris Zankel