kernel.git/arch/xtensa/include/asm/cmpxchg.h, branch linux-5.3.yHosts the 0x221E linux distro kernel.
https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.3.y2019-05-07T17:36:31Zxtensa: add exclusive atomics support2019-05-07T17:36:31ZMax Filippov2018-12-21T01:18:12Zurn:sha1:f7c34874f04a80d6c39a32f08da2529e59602d3c
Implement atomic primitives using exclusive access opcodes available in
the recent xtensa cores.
Since l32ex/s32ex don't have any memory ordering guarantees don't define
__smp_mb__before_atomic/__smp_mb__after_atomic to make them use memw.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
xtensa: provide xchg for sizes 1 and 22019-02-07T20:24:17ZMax Filippov2019-01-02T03:29:07Zurn:sha1:af3d890b4303cfc9df4b785c852246d4c7013436
This is required for generic queued spinlocks, implement it.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
xtensa: implement fake NMI2015-08-17T04:33:39ZMax Filippov2015-07-16T07:37:31Zurn:sha1:38fef73c21d117cf992fb5ec6e30630e54e13f4f
In case perf IRQ is the highest of the medium-level IRQs, and is alone
on its level, it may be treated as NMI:
- LOCKLEVEL is defined to be one level less than EXCM level,
- IRQ masking never lowers current IRQ level,
- new fake exception cause code, EXCCAUSE_MAPPED_NMI is assigned to that
IRQ; new second level exception handler, do_nmi, assigned to it
handles it as NMI,
- atomic operations in configurations without s32c1i still need to mask
all interrupts.
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
arch: xtensa: include: asm: compiling issue, need cmpxchg64() defined.2013-06-05T17:14:21ZChen Gang2013-05-27T11:57:01Zurn:sha1:b5514786ec3257c8703fc7f29bdf98b42253ee39
When compiling with 'allmodconfig', some of drivers need cmpxchg64(),
xtensa does not supply 64-bit implementation for 'xchg', so use the
'generic' implementation.
e.g. (for next-20130527 tree):
drivers/block/blockconsole.c:164:2: error: implicit declaration of function ‘cmpxchg64’ [-Werror=implicit-function-declaration]
Signed-off-by: Chen Gang <gang.chen@asianux.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
xtensa: clean up files to make them code-style compliant2012-12-19T05:10:25ZChris Zankel2012-11-29T00:53:51Zurn:sha1:c4c4594b005d89b56964071bbbdeb07daac5bc76
Remove heading and trailing spaces, trim trailing lines, and wrap lines
that are longer than 80 characters.
Signed-off-by: Chris Zankel <chris@zankel.net>
xtensa: add s32c1i-based atomic ops implementations2012-12-19T05:10:22ZMax Filippov2012-11-10T23:30:02Zurn:sha1:219b1e4c61c108731bb665962231b1fa057f6c71
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
xtensa: reorganize SR referencing2012-10-16T04:48:08ZMax Filippov2012-10-14T23:55:38Zurn:sha1:bc5378fcba974317f9657c4fdc78af227e1e1068
- reference SRs by names where possible, not by numbers;
- get rid of __stringify around SR names where possible;
- remove unneeded SR names from asm/regs.h;
- add SREG_ prefix to remaining SR names;
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Chris Zankel <chris@zankel.net>
Disintegrate asm/system.h for Xtensa2012-03-28T17:30:03ZDavid Howells2012-03-28T17:30:03Zurn:sha1:f9aa7e1882f3ceec919b30f64a2ce6e66a2571b1
Disintegrate asm/system.h for Xtensa.
Signed-off-by: David Howells <dhowells@redhat.com>
cc: Chris Zankel <chris@zankel.net>