kernel.git/arch/x86/lib/hash.c, branch linux-3.17.y

x86, hash: Simplify switch, add __init annotation

2014-03-19T23:51:04Z

Minor cleanups: - simplify switch statement - add __init annotation to setup_arch_fast_hash() Signed-off-by: Jan Beulich Link: http://lkml.kernel.org/r/530F09CE020000780011FBEF@nat28.tlf.novell.com Cc: Francesco Fusco Cc: Thomas Graf Cc: David S. Miller Acked-by: Daniel Borkmann Signed-off-by: H. Peter Anvin

x86, hash: Swap arguments passed to crc32_u32()

2014-03-19T23:51:04Z

... to match the function's parameters. While reportedly commutative, using the proper order allows for leveraging the instruction permitting the source operand to be in memory. [ hpa: This code originated in the dpdk toolkit. This was a bug in dpdk which has recently been fixed in part due to an earlier version of this patch. ] Signed-off-by: Jan Beulich Link: http://lkml.kernel.org/r/530F09B6020000780011FBEB@nat28.tlf.novell.com Acked-by: Daniel Borkmann Cc: Francesco Fusco Cc: Thomas Graf Cc: David S. Miller Signed-off-by: H. Peter Anvin

x86, hash: Fix build failure with older binutils

2014-03-19T23:51:04Z

Just like for other ISA extension instruction uses we should check whether the assembler actually supports them. The fallback here simply is to encode an instruction with fixed operands (%eax and %ecx). [ hpa: tagging for -stable as a build fix ] Signed-off-by: Jan Beulich Link: http://lkml.kernel.org/r/530F0996020000780011FBE7@nat28.tlf.novell.com Cc: Francesco Fusco Cc: Thomas Graf Cc: David S. Miller Acked-by: Daniel Borkmann Signed-off-by: H. Peter Anvin Cc: # v3.14

lib: introduce arch optimized hash library

2013-12-17T19:27:17Z

We introduce a new hashing library that is meant to be used in the contexts where speed is more important than uniformity of the hashed values. The hash library leverages architecture specific implementation to achieve high performance and fall backs to jhash() for the generic case. On Intel-based x86 architectures, the library can exploit the crc32l instruction, part of the Intel SSE4.2 instruction set, if the instruction is supported by the processor. This implementation is twice as fast as the jhash() implementation on an i7 processor. Additional architectures, such as Arm64 provide instructions for accelerating the computation of CRC, so they could be added as well in follow-up work. Signed-off-by: Francesco Fusco Signed-off-by: Daniel Borkmann Signed-off-by: Thomas Graf Cc: linux-kernel@vger.kernel.org Signed-off-by: David S. Miller