<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/x86/kernel/tsc.c, branch linux-2.6.28.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.28.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.28.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2008-11-08T16:05:38Z</updated>
<entry>
<title>sched: optimize sched_clock() a bit</title>
<updated>2008-11-08T16:05:38Z</updated>
<author>
<name>Ingo Molnar</name>
</author>
<published>2008-11-08T16:05:38Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7cbaef9c83e58bbd4bdd534b09052b6c5ec457d5'/>
<id>urn:sha1:7cbaef9c83e58bbd4bdd534b09052b6c5ec457d5</id>
<content type='text'>
sched_clock() uses cycles_2_ns() needlessly - which is an irq-disabling
variant of __cycles_2_ns().

Most of the time sched_clock() is called with irqs disabled already.
The few places that call it with irqs enabled need to be updated.

Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: don't use tsc_khz to calculate lpj if notsc is passed</title>
<updated>2008-11-04T08:55:26Z</updated>
<author>
<name>Alok Kataria</name>
</author>
<published>2008-11-03T19:18:47Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=70de9a97049e0ba79dc040868564408d5ce697f9'/>
<id>urn:sha1:70de9a97049e0ba79dc040868564408d5ce697f9</id>
<content type='text'>
Impact: fix udelay when "notsc" boot parameter is passed

With notsc passed on commandline, tsc may not be used for
udelays, make sure that we do not use tsc_khz to calculate
the lpj value in such cases.

Reported-by: Bartlomiej Zolnierkiewicz &lt;bzolnier@gmail.com&gt;
Signed-off-by: Alok N Kataria &lt;akataria@vmware.com&gt;
Cc: &lt;stable@kernel.org&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: use CONFIG_X86_SMP instead of CONFIG_SMP</title>
<updated>2008-10-30T21:53:10Z</updated>
<author>
<name>James Bottomley</name>
</author>
<published>2008-10-30T21:05:39Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=017d9d20d88cacb0a6a29f343b23c95e203f6645'/>
<id>urn:sha1:017d9d20d88cacb0a6a29f343b23c95e203f6645</id>
<content type='text'>
Impact: fix x86/Voyager boot

CONFIG_SMP is used for features which work on *all* x86 boxes.
CONFIG_X86_SMP is used for standard PC like x86 boxes (for things like
multi core and apics)

Signed-off-by: James Bottomley &lt;James.Bottomley@HansenPartnership.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>Merge branches 'x86/alternatives', 'x86/cleanups', 'x86/commandline', 'x86/crashdump', 'x86/debug', 'x86/defconfig', 'x86/doc', 'x86/exports', 'x86/fpu', 'x86/gart', 'x86/idle', 'x86/mm', 'x86/mtrr', 'x86/nmi-watchdog', 'x86/oprofile', 'x86/paravirt', 'x86/reboot', 'x86/sparse-fixes', 'x86/tsc', 'x86/urgent' and 'x86/vmalloc' into x86-v28-for-linus-phase1</title>
<updated>2008-10-06T16:17:07Z</updated>
<author>
<name>Ingo Molnar</name>
</author>
<published>2008-10-06T16:17:07Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e496e3d645c93206faf61ff6005995ebd08cc39c'/>
<id>urn:sha1:e496e3d645c93206faf61ff6005995ebd08cc39c</id>
<content type='text'>
</content>
</entry>
<entry>
<title>x86, tsc calibration: fix</title>
<updated>2008-09-06T21:55:40Z</updated>
<author>
<name>Ingo Molnar</name>
</author>
<published>2008-09-06T21:55:40Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5df45515512436a808d3476a90e83f2efb022422'/>
<id>urn:sha1:5df45515512436a808d3476a90e83f2efb022422</id>
<content type='text'>
my brown paperbag day ...

Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: quick TSC calibration, improve</title>
<updated>2008-09-04T21:21:57Z</updated>
<author>
<name>Ingo Molnar</name>
</author>
<published>2008-09-04T20:47:47Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=4156e9a8ef5b521185f451213d33fa661f38512e'/>
<id>urn:sha1:4156e9a8ef5b521185f451213d33fa661f38512e</id>
<content type='text'>
- make sure the final TSC timestamp is reliable too

Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: quick TSC calibration</title>
<updated>2008-09-04T20:54:50Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2008-09-04T17:41:22Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6ac40ed0413ef4096720f966e11c7cdf259eee3f'/>
<id>urn:sha1:6ac40ed0413ef4096720f966e11c7cdf259eee3f</id>
<content type='text'>
Introduce a fast TSC-calibration method on sane hardware.

It only uses 17920 PIT timer ticks to calibrate the TSC, plus 256 ticks on
each side to make sure the TSC values were very close to the tick, so the
whole calibration takes 15ms. Yet, despite only takign 15ms,
we can actually give pretty stringent guarantees of accuracy:

 - the code requires that we hit each 256-counter block at least 50 times,
   so the TSC error is basically at *MOST* just a few PIT cycles off in
   any direction. In practice, it's going to be about one microseconds
   off (which is how long it takes to read the counter)

 - so over 17920 PIT cycles, we can pretty much guarantee that the
   calibration error is less than one half of a percent.

My testing bears this out: on my machine, the quick-calibration reports
2934.085kHz, while the slow one reports 2933.415.

Yes, the slower calibration is still more precise. For me, the slow
calibration is stable to within about one hundreth of a percent, so it's
(at a guess) roughly an order-and-a-half of magnitude more precise. The
longer you wait, the more precise you can be.

However, the nice thing about the fast TSC PIT synchronization is that
it's pretty much _guaranteed_ to give that 0.5% precision, and fail
gracefully (and very quickly) if it doesn't get it. And it really is
fairly simple (even if there's a lot of _details_ there, and I didn't get
all of those right ont he first try or even the second ;)

The patch says "110 insertions", but 63 of those new lines are actually
comments.

Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
---
 arch/x86/kernel/tsc.c |  111 ++++++++++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 110 insertions(+), 1 deletions(-)
</content>
</entry>
<entry>
<title>x86: TSC make the calibration loop smarter</title>
<updated>2008-09-04T15:35:35Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2008-09-04T15:18:59Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a977c400957451f3bd92b9ed6022f5fe8a6cbbf5'/>
<id>urn:sha1:a977c400957451f3bd92b9ed6022f5fe8a6cbbf5</id>
<content type='text'>
The last changes made the calibration loop 250ms long which is far
too much. Try to do that more clever.

Experiments have shown that using a 10ms delay for the PIT based calibration
gives us a good enough value. If we have a reference (HPET/PMTIMER) and the
result of the PIT and the reference is close enough, then we can break out of
the calibration loop on a match right away and use the reference value.

Otherwise we just loop 3 times and decide then, which value to take.

One caveat is that for virtualized environments the PIT calibration often does
not work at all and I found out that 10us is a bit too short as well for the
reference to give a sane result. The solution here is to make the last loop
longer when the first two PIT calibrations failed.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: TSC: use one set of reference variables</title>
<updated>2008-09-04T15:35:34Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2008-09-04T15:18:53Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=827014be05e4515fa0dfc32e3100c4dab2070a98'/>
<id>urn:sha1:827014be05e4515fa0dfc32e3100c4dab2070a98</id>
<content type='text'>
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: TSC: separate hpet/pmtimer calculation out</title>
<updated>2008-09-04T15:35:33Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2008-09-04T15:18:48Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d683ef7afe8b6dbac6a3c681cef8a908357793ca'/>
<id>urn:sha1:d683ef7afe8b6dbac6a3c681cef8a908357793ca</id>
<content type='text'>
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
</feed>
