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<title>kernel.git/arch/x86/kernel/cpu, branch linux-3.15.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.15.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.15.y'/>
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<updated>2014-07-28T15:08:26Z</updated>
<entry>
<title>perf/x86/intel: ignore CondChgd bit to avoid false NMI handling</title>
<updated>2014-07-28T15:08:26Z</updated>
<author>
<name>HATAYAMA Daisuke</name>
</author>
<published>2014-06-25T01:09:07Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=80d31f5e5b701cf96c7bd5b141575060f01a0c2b'/>
<id>urn:sha1:80d31f5e5b701cf96c7bd5b141575060f01a0c2b</id>
<content type='text'>
commit b292d7a10487aee6e74b1c18b8d95b92f40d4a4f upstream.

Currently, any NMI is falsely handled by a NMI handler of NMI watchdog
if CondChgd bit in MSR_CORE_PERF_GLOBAL_STATUS MSR is set.

For example, we use external NMI to make system panic to get crash
dump, but in this case, the external NMI is falsely handled do to the
issue.

This commit deals with the issue simply by ignoring CondChgd bit.

Here is explanation in detail.

On x86 NMI watchdog uses performance monitoring feature to
periodically signal NMI each time performance counter gets overflowed.

intel_pmu_handle_irq() is called as a NMI_LOCAL handler from a NMI
handler of NMI watchdog, perf_event_nmi_handler(). It identifies an
owner of a given NMI by looking at overflow status bits in
MSR_CORE_PERF_GLOBAL_STATUS MSR. If some of the bits are set, then it
handles the given NMI as its own NMI.

The problem is that the intel_pmu_handle_irq() doesn't distinguish
CondChgd bit from other bits. Unlike the other status bits, CondChgd
bit doesn't represent overflow status for performance counters. Thus,
CondChgd bit cannot be thought of as a mark indicating a given NMI is
NMI watchdog's.

As a result, if CondChgd bit is set, any NMI is falsely handled by the
NMI handler of NMI watchdog. Also, if type of the falsely handled NMI
is either NMI_UNKNOWN, NMI_SERR or NMI_IO_CHECK, the corresponding
action is never performed until CondChgd bit is cleared.

I noticed this behavior on systems with Ivy Bridge processors: Intel
Xeon CPU E5-2630 v2 and Intel Xeon CPU E7-8890 v2. On both systems,
CondChgd bit in MSR_CORE_PERF_GLOBAL_STATUS MSR has already been set
in the beginning at boot. Then the CondChgd bit is immediately cleared
by next wrmsr to MSR_CORE_PERF_GLOBAL_CTRL MSR and appears to remain
0.

On the other hand, on older processors such as Nehalem, Xeon E7540,
CondChgd bit is not set in the beginning at boot.

I'm not sure about exact behavior of CondChgd bit, in particular when
this bit is set. Although I read Intel System Programmer's Manual to
figure out that, the descriptions I found are:

  In 18.9.1:

  "The MSR_PERF_GLOBAL_STATUS MSR also provides a ¡sticky bit¢ to
   indicate changes to the state of performancmonitoring hardware"

  In Table 35-2 IA-32 Architectural MSRs

  63 CondChg: status bits of this register has changed.

These are different from the bahviour I see on the actual system as I
explained above.

At least, I think ignoring CondChgd bit should be enough for NMI
watchdog perspective.

Signed-off-by: HATAYAMA Daisuke &lt;d.hatayama@jp.fujitsu.com&gt;
Acked-by: Don Zickus &lt;dzickus@redhat.com&gt;
Signed-off-by: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Arnaldo Carvalho de Melo &lt;acme@kernel.org&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: linux-kernel@vger.kernel.org
Link: http://lkml.kernel.org/r/20140625.103503.409316067.d.hatayama@jp.fujitsu.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>Revert "x86/smpboot: Initialize secondary CPU only if master CPU will wait for it"</title>
<updated>2014-06-08T17:09:49Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2014-06-08T17:09:49Z</published>
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<id>urn:sha1:bb077d600689dbf9305758efed1e16775db1c84c</id>
<content type='text'>
This reverts commit 3e1a878b7ccdb31da6d9d2b855c72ad87afeba3f.

It came in very late, and already has one reported failure: Sitsofe
reports that the current tree fails to boot on his EeePC, and bisected
it down to this.  Rather than waste time trying to figure out what's
wrong, just revert it.

Reported-by: Sitsofe Wheeler &lt;sitsofe@gmail.com&gt;
Cc: Igor Mammedov &lt;imammedo@redhat.com&gt;
Cc: Toshi Kani &lt;toshi.kani@hp.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: Ingo Molnar &lt;mingo@kernel.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>x86/smpboot: Initialize secondary CPU only if master CPU will wait for it</title>
<updated>2014-06-05T14:33:08Z</updated>
<author>
<name>Igor Mammedov</name>
</author>
<published>2014-06-05T13:42:45Z</published>
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<id>urn:sha1:3e1a878b7ccdb31da6d9d2b855c72ad87afeba3f</id>
<content type='text'>
Hang is observed on virtual machines during CPU hotplug,
especially in big guests with many CPUs. (It reproducible
more often if host is over-committed).

It happens because master CPU gives up waiting on
secondary CPU and allows it to run wild. As result
AP causes locking or crashing system. For example
as described here:

   https://lkml.org/lkml/2014/3/6/257

If master CPU have sent STARTUP IPI successfully,
and AP signalled to master CPU that it's ready
to start initialization, make master CPU wait
indefinitely till AP is onlined.
To ensure that AP won't ever run wild, make it
wait at early startup till master CPU confirms its
intention to wait for AP. If AP doesn't respond in 10
seconds, the master CPU will timeout and cancel
AP onlining.

Signed-off-by: Igor Mammedov &lt;imammedo@redhat.com&gt;
Acked-by: Toshi Kani &lt;toshi.kani@hp.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: http://lkml.kernel.org/r/1401975765-22328-4-git-send-email-imammedo@redhat.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2014-05-23T17:02:34Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2014-05-23T17:02:34Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e6a32c3ad1e78a33dda5ee9e9ca5704288d35fd4'/>
<id>urn:sha1:e6a32c3ad1e78a33dda5ee9e9ca5704288d35fd4</id>
<content type='text'>
Pull perf fixes from Ingo Molnar:
 "The biggest changes are fixes for races that kept triggering Trinity
  crashes, plus liblockdep build fixes and smaller misc fixes.

  The liblockdep bits in perf/urgent are a pull mistake - they should
  have been in locking/urgent - but by the time I noticed other commits
  were added and testing was done :-/ Sorry about that"

* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  perf: Fix a race between ring_buffer_detach() and ring_buffer_attach()
  perf: Prevent false warning in perf_swevent_add
  perf: Limit perf_event_attr::sample_period to 63 bits
  tools/liblockdep: Remove all build files when doing make clean
  tools/liblockdep: Build liblockdep from tools/Makefile
  perf/x86/intel: Fix Silvermont's event constraints
  perf: Fix perf_event_init_context()
  perf: Fix race in removing an event
</content>
</entry>
<entry>
<title>x86, rdrand: When nordrand is specified, disable RDSEED as well</title>
<updated>2014-05-12T03:25:20Z</updated>
<author>
<name>H. Peter Anvin</name>
</author>
<published>2014-05-12T03:25:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7a5091d58419b4e5222abce58a40c072786ea1d6'/>
<id>urn:sha1:7a5091d58419b4e5222abce58a40c072786ea1d6</id>
<content type='text'>
One can logically expect that when the user has specified "nordrand",
the user doesn't want any use of the CPU random number generator,
neither RDRAND nor RDSEED, so disable both.

Reported-by: Stephan Mueller &lt;smueller@chronox.de&gt;
Cc: Theodore Ts'o &lt;tytso@mit.edu&gt;
Link: http://lkml.kernel.org/r/21542339.0lFnPSyGRS@myon.chronox.de
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>perf/x86/intel: Fix Silvermont's event constraints</title>
<updated>2014-05-07T09:33:16Z</updated>
<author>
<name>Yan, Zheng</name>
</author>
<published>2014-04-29T07:04:41Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a4b4f11b2783ec678cccb4ce7e4ce9665aa04a24'/>
<id>urn:sha1:a4b4f11b2783ec678cccb4ce7e4ce9665aa04a24</id>
<content type='text'>
Event 0x013c is not the same as fixed counter2, remove it from
Silvermont's event constraints.

Signed-off-by: Yan, Zheng &lt;zheng.z.yan@intel.com&gt;
Signed-off-by: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Arnaldo Carvalho de Melo &lt;acme@kernel.org&gt;
Cc: Stephane Eranian &lt;eranian@google.com&gt;
Link: http://lkml.kernel.org/r/1398755081-12471-1-git-send-email-zheng.z.yan@intel.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
<entry>
<title>asmlinkage, x86: Add explicit __visible to arch/x86/*</title>
<updated>2014-05-05T23:07:44Z</updated>
<author>
<name>Andi Kleen</name>
</author>
<published>2014-05-01T22:44:37Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2605fc216fa492f9e7c488bdc7f687cd6dcc703b'/>
<id>urn:sha1:2605fc216fa492f9e7c488bdc7f687cd6dcc703b</id>
<content type='text'>
As requested by Linus add explicit __visible to the asmlinkage users.
This marks all functions visible to assembler.

Tree sweep for arch/x86/*

Signed-off-by: Andi Kleen &lt;ak@linux.intel.com&gt;
Link: http://lkml.kernel.org/r/1398984278-29319-3-git-send-email-andi@firstfloor.org
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>perf/x86: Fix RAPL rdmsrl_safe() usage</title>
<updated>2014-04-24T06:12:41Z</updated>
<author>
<name>Stephane Eranian</name>
</author>
<published>2014-04-23T17:04:19Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=9f7ff8931e3c5ddc8535476971ec9501e9555c05'/>
<id>urn:sha1:9f7ff8931e3c5ddc8535476971ec9501e9555c05</id>
<content type='text'>
This patch fixes a bug introduced by:

  24223657806a ("perf/x86/intel: Use rdmsrl_safe() when initializing RAPL PMU")

The rdmsrl_safe() function returns 0 on success.
The current code was failing to detect the RAPL PMU
on real hardware  (missing /sys/devices/power) because
the return value of rdmsrl_safe() was misinterpreted.

Signed-off-by: Stephane Eranian &lt;eranian@google.com&gt;
Acked-by: Borislav Petkov &lt;bp@suse.de&gt;
Acked-by: Venkatesh Srinivas &lt;venkateshs@google.com&gt;
Cc: peterz@infradead.org
Cc: zheng.z.yan@intel.com
Link: http://lkml.kernel.org/r/20140423170418.GA12767@quad
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2014-04-19T17:41:43Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2014-04-19T17:41:43Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6d4596905b65bf4c63c1a008f50bf385fa49f19b'/>
<id>urn:sha1:6d4596905b65bf4c63c1a008f50bf385fa49f19b</id>
<content type='text'>
Pull x86 fix from Ingo Molnar:
 "This fixes the preemption-count imbalance crash reported by Owen
  Kibel"

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/mce: Fix CMCI preemption bugs
</content>
</entry>
<entry>
<title>perf/x86/intel: Use rdmsrl_safe() when initializing RAPL PMU</title>
<updated>2014-04-18T10:14:26Z</updated>
<author>
<name>Venkatesh Srinivas</name>
</author>
<published>2014-03-13T19:36:26Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=24223657806a0ebd0ae5c9caaf7b021091889cf2'/>
<id>urn:sha1:24223657806a0ebd0ae5c9caaf7b021091889cf2</id>
<content type='text'>
CPUs which should support the RAPL counters according to
Family/Model/Stepping may still issue #GP when attempting to access
the RAPL MSRs. This may happen when Linux is running under KVM and
we are passing-through host F/M/S data, for example. Use rdmsrl_safe
to first access the RAPL_POWER_UNIT MSR; if this fails, do not
attempt to use this PMU.

Signed-off-by: Venkatesh Srinivas &lt;venkateshs@google.com&gt;
Signed-off-by: Peter Zijlstra &lt;peterz@infradead.org&gt;
Link: http://lkml.kernel.org/r/1394739386-22260-1-git-send-email-venkateshs@google.com
Cc: zheng.z.yan@intel.com
Cc: eranian@google.com
Cc: ak@linux.intel.com
Cc: linux-kernel@vger.kernel.org
[ The patch also silently fixes another bug: rapl_pmu_init() didn't handle the memory alloc failure case previously. ]
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
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